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Searched refs:PLL_PLLDV_RDIV_MASK (Results 1 – 3 of 3) sorted by relevance

/hal_nxp-3.7.0/s32/drivers/s32k3/BaseNXP/header/
DS32K344_PLL.h140 #define PLL_PLLDV_RDIV_MASK (0x7000U) macro
143 … (((uint32_t)(((uint32_t)(x)) << PLL_PLLDV_RDIV_SHIFT)) & PLL_PLLDV_RDIV_MASK)
/hal_nxp-3.7.0/s32/drivers/s32k3/Mcu/src/
DClock_Ip_Pll.c197 Value &= ~(PLL_PLLDV_RDIV_MASK | PLL_PLLDV_MFI_MASK); in Clock_Ip_SetPllRdivMfiMfnOdiv2SdmenSsscgbypSpreadctlStepnoStepsize()
336 Value &= ~(PLL_PLLDV_RDIV_MASK | PLL_PLLDV_MFI_MASK); in Clock_Ip_SetPllRdivMfiMfnOdiv2Sdmen()
DClock_Ip_Frequency.c4003 Rdiv = ((Base->PLLDV & PLL_PLLDV_RDIV_MASK) >> PLL_PLLDV_RDIV_SHIFT); /* Rdiv */ in Clock_Ip_PLL_VCO()