Searched refs:PLL_DDR (Results 1 – 2 of 2) sorted by relevance
65 …ccmAnalogPllDdrControl = CCM_ANALOG_TUPLE(PLL_DDR, CCM_ANALOG_PLL_DDR_POWERDOWN_SHIFT), /*!<…82 …ccmAnalogPllDdrClock = CCM_ANALOG_TUPLE(PLL_DDR, CCM_ANALOG_PLL_DDR_ENABLE_CLK_SHIFT), …83 …ccmAnalogPllDdrDiv2Clock = CCM_ANALOG_TUPLE(PLL_DDR, CCM_ANALOG_PLL_DDR_DIV2_ENABLE_CLK_SHIFT),…
8569 …__IO uint32_t PLL_DDR; /**< Anadig DDR PLL Control Register, offse… member8635 #define CCM_ANALOG_PLL_DDR_REG(base) ((base)->PLL_DDR)