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Searched refs:PLL_ARM_CLR (Results 1 – 9 of 9) sorted by relevance

/hal_nxp-3.7.0/imx/devices/MCIMX6X/
DMCIMX6X_M4.h5390 …__IO uint32_t PLL_ARM_CLR; /**< Analog ARM PLL control Register, offse… member
5461 #define CCM_ANALOG_PLL_ARM_CLR_REG(base) ((base)->PLL_ARM_CLR)
/hal_nxp-3.7.0/imx/devices/MCIMX7D/
DMCIMX7D_M4.h8567 …__IO uint32_t PLL_ARM_CLR; /**< Anadig ARM PLL control Register, offse… member
8633 #define CCM_ANALOG_PLL_ARM_CLR_REG(base) ((base)->PLL_ARM_CLR)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1041/
DMIMXRT1041.h8402 …__IO uint32_t PLL_ARM_CLR; /**< Analog ARM PLL control Register, offset: 0x8… member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1051/
DMIMXRT1051.h7172 …__IO uint32_t PLL_ARM_CLR; /**< Analog ARM PLL control Register, offset: 0x8… member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1061/
DMIMXRT1061.h8507 …__IO uint32_t PLL_ARM_CLR; /**< Analog ARM PLL control Register, offset: 0x8… member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1052/
DMIMXRT1052.h7175 …__IO uint32_t PLL_ARM_CLR; /**< Analog ARM PLL control Register, offset: 0x8… member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1042/
DMIMXRT1042.h8404 …__IO uint32_t PLL_ARM_CLR; /**< Analog ARM PLL control Register, offset: 0x8… member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1062/
DMIMXRT1062.h8511 …__IO uint32_t PLL_ARM_CLR; /**< Analog ARM PLL control Register, offset: 0x8… member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1064/
DMIMXRT1064.h8589 …__IO uint32_t PLL_ARM_CLR; /**< Analog ARM PLL control Register, offset: 0x8… member