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Searched refs:PLLTMR (Results 1 – 1 of 1) sorted by relevance

/hal_nxp-3.7.0/imx/devices/MCIMX7D/
DMCIMX7D_M4.h30282 __IO uint32_t PLLTMR; /**< PLL Timer Register, offset: 0xA0 */ member
30328 #define MIPI_DSI_PLLTMR_REG(base) ((base)->PLLTMR)