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Searched refs:PIT_TCTRL_CHN_MASK (Results 1 – 25 of 72) sorted by relevance

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/hal_nxp-3.7.0/mcux/mcux-sdk/drivers/pit/
Dfsl_pit.h134 base->CHANNEL[channel].TCTRL |= PIT_TCTRL_CHN_MASK; in PIT_SetTimerChainMode()
138 base->CHANNEL[channel].TCTRL &= ~PIT_TCTRL_CHN_MASK; in PIT_SetTimerChainMode()
Dfsl_pit.c90 base->CHANNEL[i].TCTRL &= ~(PIT_TCTRL_TEN_MASK | PIT_TCTRL_TIE_MASK | PIT_TCTRL_CHN_MASK); in PIT_Init()
/hal_nxp-3.7.0/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_PIT.h218 #define PIT_TCTRL_CHN_MASK (0x4U) macro
221 … (((uint32_t)(((uint32_t)(x)) << PIT_TCTRL_CHN_SHIFT)) & PIT_TCTRL_CHN_MASK)
/hal_nxp-3.7.0/s32/drivers/s32k3/BaseNXP/header/
DS32K344_PIT.h247 #define PIT_TCTRL_CHN_MASK (0x4U) macro
250 … (((uint32_t)(((uint32_t)(x)) << PIT_TCTRL_CHN_SHIFT)) & PIT_TCTRL_CHN_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKE04Z4/
DMKE04Z4.h3742 #define PIT_TCTRL_CHN_MASK (0x4U) macro
3748 … (((uint32_t)(((uint32_t)(x)) << PIT_TCTRL_CHN_SHIFT)) & PIT_TCTRL_CHN_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKE02Z4/
DMKE02Z4.h3814 #define PIT_TCTRL_CHN_MASK (0x4U) macro
3820 … (((uint32_t)(((uint32_t)(x)) << PIT_TCTRL_CHN_SHIFT)) & PIT_TCTRL_CHN_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKE04Z1284/
DMKE04Z1284.h3802 #define PIT_TCTRL_CHN_MASK (0x4U) macro
3808 … (((uint32_t)(((uint32_t)(x)) << PIT_TCTRL_CHN_SHIFT)) & PIT_TCTRL_CHN_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKE06Z4/
DMKE06Z4.h4576 #define PIT_TCTRL_CHN_MASK (0x4U) macro
4582 … (((uint32_t)(((uint32_t)(x)) << PIT_TCTRL_CHN_SHIFT)) & PIT_TCTRL_CHN_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKL25Z4/
DMKL25Z4.h2980 #define PIT_TCTRL_CHN_MASK (0x4U) macro
2982 … (((uint32_t)(((uint32_t)(x)) << PIT_TCTRL_CHN_SHIFT)) & PIT_TCTRL_CHN_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKL17Z644/
DMKL17Z644.h5582 #define PIT_TCTRL_CHN_MASK (0x4U) macro
5588 … (((uint32_t)(((uint32_t)(x)) << PIT_TCTRL_CHN_SHIFT)) & PIT_TCTRL_CHN_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKL27Z644/
DMKL27Z644.h5591 #define PIT_TCTRL_CHN_MASK (0x4U) macro
5597 … (((uint32_t)(((uint32_t)(x)) << PIT_TCTRL_CHN_SHIFT)) & PIT_TCTRL_CHN_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKV30F12810/
DMKV30F12810.h7434 #define PIT_TCTRL_CHN_MASK (0x4U) macro
7440 … (((uint32_t)(((uint32_t)(x)) << PIT_TCTRL_CHN_SHIFT)) & PIT_TCTRL_CHN_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK02F12810/
DMK02F12810.h7429 #define PIT_TCTRL_CHN_MASK (0x4U) macro
7435 … (((uint32_t)(((uint32_t)(x)) << PIT_TCTRL_CHN_SHIFT)) & PIT_TCTRL_CHN_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKV31F12810/
DMKV31F12810.h8068 #define PIT_TCTRL_CHN_MASK (0x4U) macro
8074 … (((uint32_t)(((uint32_t)(x)) << PIT_TCTRL_CHN_SHIFT)) & PIT_TCTRL_CHN_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKM14ZA5/
DMKM14ZA5.h7713 #define PIT_TCTRL_CHN_MASK (0x4U) macro
7719 … (((uint32_t)(((uint32_t)(x)) << PIT_TCTRL_CHN_SHIFT)) & PIT_TCTRL_CHN_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKV31F51212/
DMKV31F51212.h9211 #define PIT_TCTRL_CHN_MASK (0x4U) macro
9217 … (((uint32_t)(((uint32_t)(x)) << PIT_TCTRL_CHN_SHIFT)) & PIT_TCTRL_CHN_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKV31F25612/
DMKV31F25612.h8965 #define PIT_TCTRL_CHN_MASK (0x4U) macro
8971 … (((uint32_t)(((uint32_t)(x)) << PIT_TCTRL_CHN_SHIFT)) & PIT_TCTRL_CHN_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/K32L2B31A/
DK32L2B31A.h10064 #define PIT_TCTRL_CHN_MASK (0x4U) macro
10071 #define PIT_TCTRL_CHN(x) (((uint32_t)(((uint32_t)(x)) << PIT_TCTRL_CHN_SHIFT)) & PIT_TCTRL_CHN_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK22F12810/
DMK22F12810.h8807 #define PIT_TCTRL_CHN_MASK (0x4U) macro
8813 … (((uint32_t)(((uint32_t)(x)) << PIT_TCTRL_CHN_SHIFT)) & PIT_TCTRL_CHN_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/K32L2B21A/
DK32L2B21A.h10064 #define PIT_TCTRL_CHN_MASK (0x4U) macro
10071 #define PIT_TCTRL_CHN(x) (((uint32_t)(((uint32_t)(x)) << PIT_TCTRL_CHN_SHIFT)) & PIT_TCTRL_CHN_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/K32L2B11A/
DK32L2B11A.h10064 #define PIT_TCTRL_CHN_MASK (0x4U) macro
10071 #define PIT_TCTRL_CHN(x) (((uint32_t)(((uint32_t)(x)) << PIT_TCTRL_CHN_SHIFT)) & PIT_TCTRL_CHN_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKW24D5/
DMKW24D5.h5501 #define PIT_TCTRL_CHN_MASK (0x4U) macro
5503 … (((uint32_t)(((uint32_t)(x)) << PIT_TCTRL_CHN_SHIFT)) & PIT_TCTRL_CHN_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKW22D5/
DMKW22D5.h5501 #define PIT_TCTRL_CHN_MASK (0x4U) macro
5503 … (((uint32_t)(((uint32_t)(x)) << PIT_TCTRL_CHN_SHIFT)) & PIT_TCTRL_CHN_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK22F25612/
DMK22F25612.h9708 #define PIT_TCTRL_CHN_MASK (0x4U) macro
9714 … (((uint32_t)(((uint32_t)(x)) << PIT_TCTRL_CHN_SHIFT)) & PIT_TCTRL_CHN_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK22F51212/
DMK22F51212.h9964 #define PIT_TCTRL_CHN_MASK (0x4U) macro
9970 … (((uint32_t)(((uint32_t)(x)) << PIT_TCTRL_CHN_SHIFT)) & PIT_TCTRL_CHN_MASK)

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