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Searched refs:MU_SR_RFn_MASK (Results 1 – 25 of 70) sorted by relevance

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/hal_nxp-3.7.0/mcux/mcux-sdk/drivers/mu/
Dfsl_mu.h357 …return (base->SR & (MU_SR_TEn_MASK | MU_SR_RFn_MASK | MU_SR_GIPn_MASK | MU_SR_EP_MASK | MU_SR_FUP_… in MU_GetStatusFlags()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/K32L3A60/
DK32L3A60_cm0plus.h13684 #define MU_SR_RFn_MASK (0xF000000U) macro
13690 …(x) (((uint32_t)(((uint32_t)(x)) << MU_SR_RFn_SHIFT)) & MU_SR_RFn_MASK)
DK32L3A60_cm4.h13780 #define MU_SR_RFn_MASK (0xF000000U) macro
13786 …(x) (((uint32_t)(((uint32_t)(x)) << MU_SR_RFn_SHIFT)) & MU_SR_RFn_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT685S/
DMIMXRT685S_dsp.h16073 #define MU_SR_RFn_MASK (0xF000000U) macro
16079 …(x) (((uint32_t)(((uint32_t)(x)) << MU_SR_RFn_SHIFT)) & MU_SR_RFn_MASK)
DMIMXRT685S_cm33.h22906 #define MU_SR_RFn_MASK (0xF000000U) macro
22912 …(x) (((uint32_t)(((uint32_t)(x)) << MU_SR_RFn_SHIFT)) & MU_SR_RFn_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MCIMX7U3/
DMCIMX7U3_cm4.h19332 #define MU_SR_RFn_MASK (0xF000000U) macro
19338 …(x) (((uint32_t)(((uint32_t)(x)) << MU_SR_RFn_SHIFT)) & MU_SR_RFn_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MCIMX7U5/
DMCIMX7U5_cm4.h19333 #define MU_SR_RFn_MASK (0xF000000U) macro
19339 …(x) (((uint32_t)(((uint32_t)(x)) << MU_SR_RFn_SHIFT)) & MU_SR_RFn_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT633S/
DMIMXRT633S.h22906 #define MU_SR_RFn_MASK (0xF000000U) macro
22912 …(x) (((uint32_t)(((uint32_t)(x)) << MU_SR_RFn_SHIFT)) & MU_SR_RFn_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT595S/
DMIMXRT595S_dsp.h27347 #define MU_SR_RFn_MASK (0xF000000U) macro
27353 …(x) (((uint32_t)(((uint32_t)(x)) << MU_SR_RFn_SHIFT)) & MU_SR_RFn_MASK)
DMIMXRT595S_cm33.h34446 #define MU_SR_RFn_MASK (0xF000000U) macro
34452 …(x) (((uint32_t)(((uint32_t)(x)) << MU_SR_RFn_SHIFT)) & MU_SR_RFn_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT533S/
DMIMXRT533S.h32819 #define MU_SR_RFn_MASK (0xF000000U) macro
32825 …(x) (((uint32_t)(((uint32_t)(x)) << MU_SR_RFn_SHIFT)) & MU_SR_RFn_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MQ5/
DMIMX8MQ5_cm4.h40857 #define MU_SR_RFn_MASK (0xF000000U) macro
40863 …(x) (((uint32_t)(((uint32_t)(x)) << MU_SR_RFn_SHIFT)) & MU_SR_RFn_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MN1/
DMIMX8MN1_cm7.h41443 #define MU_SR_RFn_MASK (0xF000000U) macro
41449 …(x) (((uint32_t)(((uint32_t)(x)) << MU_SR_RFn_SHIFT)) & MU_SR_RFn_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MN2/
DMIMX8MN2_cm7.h41441 #define MU_SR_RFn_MASK (0xF000000U) macro
41447 …(x) (((uint32_t)(((uint32_t)(x)) << MU_SR_RFn_SHIFT)) & MU_SR_RFn_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MN3/
DMIMX8MN3_cm7.h41443 #define MU_SR_RFn_MASK (0xF000000U) macro
41449 …(x) (((uint32_t)(((uint32_t)(x)) << MU_SR_RFn_SHIFT)) & MU_SR_RFn_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MN6/
DMIMX8MN6_ca53.h41455 #define MU_SR_RFn_MASK (0xF000000U) macro
41461 …(x) (((uint32_t)(((uint32_t)(x)) << MU_SR_RFn_SHIFT)) & MU_SR_RFn_MASK)
DMIMX8MN6_cm7.h41441 #define MU_SR_RFn_MASK (0xF000000U) macro
41447 …(x) (((uint32_t)(((uint32_t)(x)) << MU_SR_RFn_SHIFT)) & MU_SR_RFn_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MN4/
DMIMX8MN4_cm7.h41441 #define MU_SR_RFn_MASK (0xF000000U) macro
41447 …(x) (((uint32_t)(((uint32_t)(x)) << MU_SR_RFn_SHIFT)) & MU_SR_RFn_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MN5/
DMIMX8MN5_cm7.h41443 #define MU_SR_RFn_MASK (0xF000000U) macro
41449 …(x) (((uint32_t)(((uint32_t)(x)) << MU_SR_RFn_SHIFT)) & MU_SR_RFn_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT555S/
DMIMXRT555S.h34445 #define MU_SR_RFn_MASK (0xF000000U) macro
34451 …(x) (((uint32_t)(((uint32_t)(x)) << MU_SR_RFn_SHIFT)) & MU_SR_RFn_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MQ7/
DMIMX8MQ7_cm4.h43030 #define MU_SR_RFn_MASK (0xF000000U) macro
43036 …(x) (((uint32_t)(((uint32_t)(x)) << MU_SR_RFn_SHIFT)) & MU_SR_RFn_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MD7/
DMIMX8MD7_cm4.h43030 #define MU_SR_RFn_MASK (0xF000000U) macro
43036 …(x) (((uint32_t)(((uint32_t)(x)) << MU_SR_RFn_SHIFT)) & MU_SR_RFn_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MD6/
DMIMX8MD6_cm4.h43030 #define MU_SR_RFn_MASK (0xF000000U) macro
43036 …(x) (((uint32_t)(((uint32_t)(x)) << MU_SR_RFn_SHIFT)) & MU_SR_RFn_MASK)
/hal_nxp-3.7.0/imx/devices/MCIMX6X/
DMCIMX6X_M4.h27621 #define MU_SR_RFn_MASK 0xF000000u macro
27623 …_RFn(x) (((uint32_t)(((uint32_t)(x))<<MU_SR_RFn_SHIFT))&MU_SR_RFn_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MQ6/
DMIMX8MQ6_cm4.h43030 #define MU_SR_RFn_MASK (0xF000000U) macro
43036 …(x) (((uint32_t)(((uint32_t)(x)) << MU_SR_RFn_SHIFT)) & MU_SR_RFn_MASK)

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