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Searched refs:MU_RR_RR0_MASK (Results 1 – 2 of 2) sorted by relevance

/hal_nxp-3.7.0/imx/devices/MCIMX6X/
DMCIMX6X_M4.h27602 #define MU_RR_RR0_MASK 0xFFFFFFFFu macro
27604 …_RR0(x) (((uint32_t)(((uint32_t)(x))<<MU_RR_RR0_SHIFT))&MU_RR_RR0_MASK)
/hal_nxp-3.7.0/imx/devices/MCIMX7D/
DMCIMX7D_M4.h30908 #define MU_RR_RR0_MASK 0xFFFFFFFFu macro
30910 …_RR0(x) (((uint32_t)(((uint32_t)(x))<<MU_RR_RR0_SHIFT))&MU_RR_RR0_MASK)