MUX_3_DC_5 (reference) in projects: hal_nxp-3.7.0

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Searched refs:MUX_3_DC_5 (Results 1 – 2 of 2) sorted by relevance

/hal_nxp-3.7.0/s32/drivers/s32ze/Mcu/src/
D	Clock_Ip_Frequency.c	3169 …Frequency &= Clock_Ip_au32EnableDivider[((IP_MC_CGM_0->MUX_3_DC_5 & MC_CGM_MUX_3_DC_5_DE_MASK) >> … in Clock_Ip_Get_P0_PSI5_S_WDOG1_CLK_Frequency() 3170 …Frequency /= (((IP_MC_CGM_0->MUX_3_DC_5 & MC_CGM_MUX_3_DC_5_DIV_MASK) >> MC_CGM_MUX_3_DC_5_DIV_SHI… in Clock_Ip_Get_P0_PSI5_S_WDOG1_CLK_Frequency() 3603 …Frequency &= Clock_Ip_au32EnableDivider[((IP_MC_CGM_4->MUX_3_DC_5 & MC_CGM_MUX_3_DC_5_DE_MASK) >> … in Clock_Ip_Get_P4_PSI5_S_WDOG1_CLK_Frequency() 3604 …Frequency /= (((IP_MC_CGM_4->MUX_3_DC_5 & MC_CGM_MUX_3_DC_5_DIV_MASK) >> MC_CGM_MUX_3_DC_5_DIV_SHI… in Clock_Ip_Get_P4_PSI5_S_WDOG1_CLK_Frequency()
/hal_nxp-3.7.0/s32/drivers/s32ze/BaseNXP/header/
D	S32Z2_MC_CGM.h	`116 …__IO uint32_t MUX_3_DC_5; /**< Clock Mux 3 Divider 5 Control Register, offs… member`

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TraceRecorderSource-3.4.0
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