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Searched refs:MMDC_MPZQSWCTRL_ZQ_SW_PD_MASK (Results 1 – 3 of 3) sorted by relevance

/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MCIMX7U3/
DMCIMX7U3_cm4.h18152 #define MMDC_MPZQSWCTRL_ZQ_SW_PD_MASK (0x1000U) macro
18158 … (((uint32_t)(((uint32_t)(x)) << MMDC_MPZQSWCTRL_ZQ_SW_PD_SHIFT)) & MMDC_MPZQSWCTRL_ZQ_SW_PD_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MCIMX7U5/
DMCIMX7U5_cm4.h18153 #define MMDC_MPZQSWCTRL_ZQ_SW_PD_MASK (0x1000U) macro
18159 … (((uint32_t)(((uint32_t)(x)) << MMDC_MPZQSWCTRL_ZQ_SW_PD_SHIFT)) & MMDC_MPZQSWCTRL_ZQ_SW_PD_MASK)
/hal_nxp-3.7.0/imx/devices/MCIMX6X/
DMCIMX6X_M4.h26748 #define MMDC_MPZQSWCTRL_ZQ_SW_PD_MASK 0x1000u macro