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Searched refs:LP_CFG1 (Results 1 – 9 of 9) sorted by relevance

/hal_nxp-3.7.0/mcux/mcux-sdk/drivers/mcx_spc/
Dfsl_spc.h1216 base->LP_CFG1 |= SPC_LP_CFG1_SOC_CNTRL(maskValue); in SPC_EnableLowPowerModeAnalogModules()
1228 base->LP_CFG1 &= ~SPC_LP_CFG1_SOC_CNTRL(maskValue); in SPC_DisableLowPowerModeAnalogModules()
1240 return base->LP_CFG1; in SPC_GetLowPowerModeEnabledAnalogModules()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MCXN946/
DMCXN946_cm33_core0.h71202 …__IO uint32_t LP_CFG1; /**< Low Power Mode Configuration 1, offset: 0x10… member
DMCXN946_cm33_core1.h71202 …__IO uint32_t LP_CFG1; /**< Low Power Mode Configuration 1, offset: 0x10… member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core1.h68544 …__IO uint32_t LP_CFG1; /**< Low Power Mode Configuration 1, offset: 0x10… member
DMCXN547_cm33_core0.h68544 …__IO uint32_t LP_CFG1; /**< Low Power Mode Configuration 1, offset: 0x10… member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h68544 …__IO uint32_t LP_CFG1; /**< Low Power Mode Configuration 1, offset: 0x10… member
DMCXN546_cm33_core1.h68544 …__IO uint32_t LP_CFG1; /**< Low Power Mode Configuration 1, offset: 0x10… member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MCXN947/
DMCXN947_cm33_core0.h71202 …__IO uint32_t LP_CFG1; /**< Low Power Mode Configuration 1, offset: 0x10… member
DMCXN947_cm33_core1.h71202 …__IO uint32_t LP_CFG1; /**< Low Power Mode Configuration 1, offset: 0x10… member