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Searched refs:INT_CTRL (Results 1 – 25 of 40) sorted by relevance

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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKW40Z4/
DMKW40Z4.h8218 …__IO uint32_t INT_CTRL; /**< RNG Interrupt Control Register, offset: 0xB4… member
8274 #define TRNG_INT_CTRL_REG(base) ((base)->INT_CTRL)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKW30Z4/
DMKW30Z4.h8218 …__IO uint32_t INT_CTRL; /**< RNG Interrupt Control Register, offset: 0xB4… member
8274 #define TRNG_INT_CTRL_REG(base) ((base)->INT_CTRL)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKW20Z4/
DMKW20Z4.h8218 …__IO uint32_t INT_CTRL; /**< RNG Interrupt Control Register, offset: 0xB4… member
8274 #define TRNG_INT_CTRL_REG(base) ((base)->INT_CTRL)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/K32L2A31A/
DK32L2A31A.h16440 __IO uint32_t INT_CTRL; /**< TRNG Interrupt Control Register, offset: 0xA4 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/K32L2A41A/
DK32L2A41A.h16440 __IO uint32_t INT_CTRL; /**< TRNG Interrupt Control Register, offset: 0xA4 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKW31Z4/
DMKW31Z4.h7305 __IO uint32_t INT_CTRL; /**< Interrupt Control Register, offset: 0xB4 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKW41Z4/
DMKW41Z4.h7305 __IO uint32_t INT_CTRL; /**< Interrupt Control Register, offset: 0xB4 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKW21Z4/
DMKW21Z4.h7234 __IO uint32_t INT_CTRL; /**< Interrupt Control Register, offset: 0xB4 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/K32L3A60/
DK32L3A60_cm0plus.h18736 __IO uint32_t INT_CTRL; /**< Interrupt Control Register, offset: 0xA4 */ member
DK32L3A60_cm4.h18686 __IO uint32_t INT_CTRL; /**< Interrupt Control Register, offset: 0xA4 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKV56F24/
DMKV56F24.h25261 …__IO uint32_t INT_CTRL; /**< RNG Interrupt Control Register, offset: 0xB4… member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKV58F24/
DMKV58F24.h27027 …__IO uint32_t INT_CTRL; /**< RNG Interrupt Control Register, offset: 0xB4… member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK80F25615/
DMK80F25615.h24178 …__IO uint32_t INT_CTRL; /**< RNG Interrupt Control Register, offset: 0xB4… member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK82F25615/
DMK82F25615.h25158 …__IO uint32_t INT_CTRL; /**< RNG Interrupt Control Register, offset: 0xB4… member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK27FA15/
DMK27FA15.h23812 …__IO uint32_t INT_CTRL; /**< RNG Interrupt Control Register, offset: 0xA4… member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK28FA15/
DMK28FA15.h23814 …__IO uint32_t INT_CTRL; /**< RNG Interrupt Control Register, offset: 0xA4… member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT685S/
DMIMXRT685S_dsp.h27698 __IO uint32_t INT_CTRL; /**< Interrupt Control Register, offset: 0xA4 */ member
DMIMXRT685S_cm33.h37345 __IO uint32_t INT_CTRL; /**< Interrupt Control Register, offset: 0xA4 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1011/
DMIMXRT1011.h29658 __IO uint32_t INT_CTRL; /**< Interrupt Control Register, offset: 0xA4 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1015/
DMIMXRT1015.h32122 __IO uint32_t INT_CTRL; /**< Interrupt Control Register, offset: 0xA4 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MCIMX7U3/
DMCIMX7U3_cm4.h31599 __IO uint32_t INT_CTRL; /**< Interrupt Control Register, offset: 0xA4 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MCIMX7U5/
DMCIMX7U5_cm4.h31600 __IO uint32_t INT_CTRL; /**< Interrupt Control Register, offset: 0xA4 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT633S/
DMIMXRT633S.h37345 __IO uint32_t INT_CTRL; /**< Interrupt Control Register, offset: 0xA4 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT595S/
DMIMXRT595S_dsp.h42332 __IO uint32_t INT_CTRL; /**< Interrupt Control Register, offset: 0xA4 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1021/
DMIMXRT1021.h37426 __IO uint32_t INT_CTRL; /**< Interrupt Control Register, offset: 0xA4 */ member

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