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Searched refs:I3C0PCTL (Results 1 – 2 of 2) sorted by relevance

/hal_nxp-3.7.0/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_GPR0_PCTL.h77 __IO uint32_t I3C0PCTL; /**< I3C_0 Clock Control Enable, offset: 0x10 */ member
/hal_nxp-3.7.0/s32/drivers/s32ze/Mcu/src/
DClock_Ip_Frequency.c2886 …Frequency &= Clock_Ip_u32EnableGate[((IP_GPR0_PCTL->I3C0PCTL & GPR0_PCTL_I3C0PCTL_PCTL_MASK) >> GP… in Clock_Ip_Get_IIIC0_CLK_Frequency()