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Searched refs:GPMI_ECCCTRL_RSVD1_MASK (Results 1 – 5 of 5) sorted by relevance

/hal_nxp-3.7.0/imx/devices/MCIMX7D/
DMCIMX7D_M4.h20243 #define GPMI_ECCCTRL_RSVD1_MASK 0xE00u macro
20245 … (((uint32_t)(((uint32_t)(x))<<GPMI_ECCCTRL_RSVD1_SHIFT))&GPMI_ECCCTRL_RSVD1_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8QM6/
DMIMX8QM6_ca53.h28458 #define GPMI_ECCCTRL_RSVD1_MASK (0xE00U) macro
28461 … (((uint32_t)(((uint32_t)(x)) << GPMI_ECCCTRL_RSVD1_SHIFT)) & GPMI_ECCCTRL_RSVD1_MASK)
DMIMX8QM6_dsp.h31291 #define GPMI_ECCCTRL_RSVD1_MASK (0xE00U) macro
31294 … (((uint32_t)(((uint32_t)(x)) << GPMI_ECCCTRL_RSVD1_SHIFT)) & GPMI_ECCCTRL_RSVD1_MASK)
DMIMX8QM6_cm4_core1.h22781 #define GPMI_ECCCTRL_RSVD1_MASK (0xE00U) macro
22783 … (((uint32_t)(((uint32_t)(x)) << GPMI_ECCCTRL_RSVD1_SHIFT)) & GPMI_ECCCTRL_RSVD1_MASK)
DMIMX8QM6_cm4_core0.h22781 #define GPMI_ECCCTRL_RSVD1_MASK (0xE00U) macro
22783 … (((uint32_t)(((uint32_t)(x)) << GPMI_ECCCTRL_RSVD1_SHIFT)) & GPMI_ECCCTRL_RSVD1_MASK)