/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC5534/ |
D | LPC5534.h | 15013 #define FLEXSPI0_BASE_NS (0x400C0000u) macro 15017 #define FLEXSPI0_NS ((FLEXSPI_Type *)FLEXSPI0_BASE_NS) 15023 #define FLEXSPI_BASE_ADDRS_NS { FLEXSPI0_BASE_NS }
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC5536/ |
D | LPC5536.h | 15013 #define FLEXSPI0_BASE_NS (0x400C0000u) macro 15017 #define FLEXSPI0_NS ((FLEXSPI_Type *)FLEXSPI0_BASE_NS) 15023 #define FLEXSPI_BASE_ADDRS_NS { FLEXSPI0_BASE_NS }
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT533S/ |
D | MIMXRT533S.h | 20688 #define FLEXSPI0_BASE_NS (0x40134000u) macro 20692 #define FLEXSPI0_NS ((FLEXSPI_Type *)FLEXSPI0_BASE_NS) 20706 #define FLEXSPI_BASE_ADDRS_NS { FLEXSPI0_BASE_NS, FLEXSPI1_BASE_NS }
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC55S36/ |
D | LPC55S36.h | 15012 #define FLEXSPI0_BASE_NS (0x400C0000u) macro 15016 #define FLEXSPI0_NS ((FLEXSPI_Type *)FLEXSPI0_BASE_NS) 15022 #define FLEXSPI_BASE_ADDRS_NS { FLEXSPI0_BASE_NS }
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT595S/ |
D | MIMXRT595S_cm33.h | 20692 #define FLEXSPI0_BASE_NS (0x40134000u) macro 20696 #define FLEXSPI0_NS ((FLEXSPI_Type *)FLEXSPI0_BASE_NS) 20710 #define FLEXSPI_BASE_ADDRS_NS { FLEXSPI0_BASE_NS, FLEXSPI1_BASE_NS }
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT555S/ |
D | MIMXRT555S.h | 20691 #define FLEXSPI0_BASE_NS (0x40134000u) macro 20695 #define FLEXSPI0_NS ((FLEXSPI_Type *)FLEXSPI0_BASE_NS) 20709 #define FLEXSPI_BASE_ADDRS_NS { FLEXSPI0_BASE_NS, FLEXSPI1_BASE_NS }
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MCXN946/ |
D | MCXN946_cm33_core0.h | 25411 #define FLEXSPI0_BASE_NS (0x400C8000u) macro 25415 #define FLEXSPI0_NS ((FLEXSPI_Type *)FLEXSPI0_BASE_NS) 25421 #define FLEXSPI_BASE_ADDRS_NS { FLEXSPI0_BASE_NS }
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D | MCXN946_cm33_core1.h | 25411 #define FLEXSPI0_BASE_NS (0x400C8000u) macro 25415 #define FLEXSPI0_NS ((FLEXSPI_Type *)FLEXSPI0_BASE_NS) 25421 #define FLEXSPI_BASE_ADDRS_NS { FLEXSPI0_BASE_NS }
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MCXN547/ |
D | MCXN547_cm33_core1.h | 25365 #define FLEXSPI0_BASE_NS (0x400C8000u) macro 25369 #define FLEXSPI0_NS ((FLEXSPI_Type *)FLEXSPI0_BASE_NS) 25375 #define FLEXSPI_BASE_ADDRS_NS { FLEXSPI0_BASE_NS }
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D | MCXN547_cm33_core0.h | 25365 #define FLEXSPI0_BASE_NS (0x400C8000u) macro 25369 #define FLEXSPI0_NS ((FLEXSPI_Type *)FLEXSPI0_BASE_NS) 25375 #define FLEXSPI_BASE_ADDRS_NS { FLEXSPI0_BASE_NS }
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MCXN546/ |
D | MCXN546_cm33_core0.h | 25365 #define FLEXSPI0_BASE_NS (0x400C8000u) macro 25369 #define FLEXSPI0_NS ((FLEXSPI_Type *)FLEXSPI0_BASE_NS) 25375 #define FLEXSPI_BASE_ADDRS_NS { FLEXSPI0_BASE_NS }
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D | MCXN546_cm33_core1.h | 25365 #define FLEXSPI0_BASE_NS (0x400C8000u) macro 25369 #define FLEXSPI0_NS ((FLEXSPI_Type *)FLEXSPI0_BASE_NS) 25375 #define FLEXSPI_BASE_ADDRS_NS { FLEXSPI0_BASE_NS }
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MCXN947/ |
D | MCXN947_cm33_core0.h | 25411 #define FLEXSPI0_BASE_NS (0x400C8000u) macro 25415 #define FLEXSPI0_NS ((FLEXSPI_Type *)FLEXSPI0_BASE_NS) 25421 #define FLEXSPI_BASE_ADDRS_NS { FLEXSPI0_BASE_NS }
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D | MCXN947_cm33_core1.h | 25411 #define FLEXSPI0_BASE_NS (0x400C8000u) macro 25415 #define FLEXSPI0_NS ((FLEXSPI_Type *)FLEXSPI0_BASE_NS) 25421 #define FLEXSPI_BASE_ADDRS_NS { FLEXSPI0_BASE_NS }
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8UD3/ |
D | MIMX8UD3_cm33.h | 18146 #define FLEXSPI0_BASE_NS (0x28039000u) macro 18150 #define FLEXSPI0_NS ((FLEXSPI_Type *)FLEXSPI0_BASE_NS) 18172 …#define FLEXSPI_BASE_ADDRS_NS { FLEXSPI0_BASE_NS, FLEXSPI1_BASE_NS, FLEXSPI2_BA…
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8UD7/ |
D | MIMX8UD7_cm33.h | 18146 #define FLEXSPI0_BASE_NS (0x28039000u) macro 18150 #define FLEXSPI0_NS ((FLEXSPI_Type *)FLEXSPI0_BASE_NS) 18172 …#define FLEXSPI_BASE_ADDRS_NS { FLEXSPI0_BASE_NS, FLEXSPI1_BASE_NS, FLEXSPI2_BA…
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8UD5/ |
D | MIMX8UD5_cm33.h | 16538 #define FLEXSPI0_BASE_NS (0x28039000u) macro 16542 #define FLEXSPI0_NS ((FLEXSPI_Type *)FLEXSPI0_BASE_NS) 16564 …#define FLEXSPI_BASE_ADDRS_NS { FLEXSPI0_BASE_NS, FLEXSPI1_BASE_NS, FLEXSPI2_BA…
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8US3/ |
D | MIMX8US3_cm33.h | 18146 #define FLEXSPI0_BASE_NS (0x28039000u) macro 18150 #define FLEXSPI0_NS ((FLEXSPI_Type *)FLEXSPI0_BASE_NS) 18172 …#define FLEXSPI_BASE_ADDRS_NS { FLEXSPI0_BASE_NS, FLEXSPI1_BASE_NS, FLEXSPI2_BA…
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8US5/ |
D | MIMX8US5_cm33.h | 16538 #define FLEXSPI0_BASE_NS (0x28039000u) macro 16542 #define FLEXSPI0_NS ((FLEXSPI_Type *)FLEXSPI0_BASE_NS) 16564 …#define FLEXSPI_BASE_ADDRS_NS { FLEXSPI0_BASE_NS, FLEXSPI1_BASE_NS, FLEXSPI2_BA…
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