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Searched refs:FLASH (Results 1 – 25 of 54) sorted by relevance

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/hal_nxp-3.7.0/mcux/mcux-sdk/components/flash/mflash/lpc55s3x/
Dmflash_drv.c87 FLASH->INTSTAT_CLR = in mflash_drv_is_readable()
89 FLASH->STARTA = addr >> 4; in mflash_drv_is_readable()
90 … FLASH->DATAW[0] = FLASH_READMODE_ECC(g_flash_instance.modeConfig.readSingleWord.readWithEccOff) | in mflash_drv_is_readable()
93 FLASH->CMD = 3; in mflash_drv_is_readable()
94 while ((FLASH->INTSTAT & FLASH_INTSTAT_DONE_MASK) == 0U) in mflash_drv_is_readable()
96 result = FLASH->INTSTAT; in mflash_drv_is_readable()
/hal_nxp-3.7.0/mcux/mcux-sdk/components/flash/mflash/lpc55xxx/
Dmflash_drv.c82 FLASH->INT_CLR_STATUS = FLASH_INT_CLR_STATUS_FAIL_MASK | FLASH_INT_CLR_STATUS_ERR_MASK | in mflash_drv_is_readable()
84 FLASH->STARTA = addr >> 4; in mflash_drv_is_readable()
85 … FLASH->DATAW[0] = FLASH_READMODE_ECC(g_flash_instance.modeConfig.readSingleWord.readWithEccOff) | in mflash_drv_is_readable()
88 FLASH->CMD = 3; in mflash_drv_is_readable()
89 while (!(FLASH->INT_STATUS & FLASH_INT_STATUS_DONE_MASK)) in mflash_drv_is_readable()
91 result = FLASH->INT_STATUS; in mflash_drv_is_readable()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC55S36/drivers/
Dfsl_power.c3095 flash_int_enable_reg = FLASH->INTEN; /* Save INT_ENABLE register. */ in POWER_SetSystemClock12MHZ()
3096 FLASH->INTEN_CLR = 0x1F; /* Disable all interrupt */ in POWER_SetSystemClock12MHZ()
3097 FLASH->INTSTAT_CLR = 0x1F; /* Clear all status flags */ in POWER_SetSystemClock12MHZ()
3102 flash_int_enable_reg = FLASH->INT_ENABLE; /* Save INT_ENABLE register. */ in POWER_SetSystemClock12MHZ()
3103 FLASH->INT_CLR_ENABLE = 0x1F; /* Disable all interrupt */ in POWER_SetSystemClock12MHZ()
3104 FLASH->INT_CLR_STATUS = 0x1F; /* Clear all status flags */ in POWER_SetSystemClock12MHZ()
3107 FLASH->DATAW[0] = num_wait_states; in POWER_SetSystemClock12MHZ()
3108 FLASH->CMD = 0x2; /* CMD_SET_READ_MODE */ in POWER_SetSystemClock12MHZ()
3112 while (0UL == (FLASH->INTSTAT & FLASH_INTSTAT_DONE_MASK)) in POWER_SetSystemClock12MHZ()
3115 FLASH->INTSTAT_CLR = 0x1F; /* Clear all status flags, then ... */ in POWER_SetSystemClock12MHZ()
[all …]
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC5536/drivers/
Dfsl_power.c3095 flash_int_enable_reg = FLASH->INTEN; /* Save INT_ENABLE register. */ in POWER_SetSystemClock12MHZ()
3096 FLASH->INTEN_CLR = 0x1F; /* Disable all interrupt */ in POWER_SetSystemClock12MHZ()
3097 FLASH->INTSTAT_CLR = 0x1F; /* Clear all status flags */ in POWER_SetSystemClock12MHZ()
3102 flash_int_enable_reg = FLASH->INT_ENABLE; /* Save INT_ENABLE register. */ in POWER_SetSystemClock12MHZ()
3103 FLASH->INT_CLR_ENABLE = 0x1F; /* Disable all interrupt */ in POWER_SetSystemClock12MHZ()
3104 FLASH->INT_CLR_STATUS = 0x1F; /* Clear all status flags */ in POWER_SetSystemClock12MHZ()
3107 FLASH->DATAW[0] = num_wait_states; in POWER_SetSystemClock12MHZ()
3108 FLASH->CMD = 0x2; /* CMD_SET_READ_MODE */ in POWER_SetSystemClock12MHZ()
3112 while (0UL == (FLASH->INTSTAT & FLASH_INTSTAT_DONE_MASK)) in POWER_SetSystemClock12MHZ()
3115 FLASH->INTSTAT_CLR = 0x1F; /* Clear all status flags, then ... */ in POWER_SetSystemClock12MHZ()
[all …]
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC5534/drivers/
Dfsl_power.c3095 flash_int_enable_reg = FLASH->INTEN; /* Save INT_ENABLE register. */ in POWER_SetSystemClock12MHZ()
3096 FLASH->INTEN_CLR = 0x1F; /* Disable all interrupt */ in POWER_SetSystemClock12MHZ()
3097 FLASH->INTSTAT_CLR = 0x1F; /* Clear all status flags */ in POWER_SetSystemClock12MHZ()
3102 flash_int_enable_reg = FLASH->INT_ENABLE; /* Save INT_ENABLE register. */ in POWER_SetSystemClock12MHZ()
3103 FLASH->INT_CLR_ENABLE = 0x1F; /* Disable all interrupt */ in POWER_SetSystemClock12MHZ()
3104 FLASH->INT_CLR_STATUS = 0x1F; /* Clear all status flags */ in POWER_SetSystemClock12MHZ()
3107 FLASH->DATAW[0] = num_wait_states; in POWER_SetSystemClock12MHZ()
3108 FLASH->CMD = 0x2; /* CMD_SET_READ_MODE */ in POWER_SetSystemClock12MHZ()
3112 while (0UL == (FLASH->INTSTAT & FLASH_INTSTAT_DONE_MASK)) in POWER_SetSystemClock12MHZ()
3115 FLASH->INTSTAT_CLR = 0x1F; /* Clear all status flags, then ... */ in POWER_SetSystemClock12MHZ()
[all …]
Dfsl_clock.c345 FLASH->INTSTAT_CLR = 0xF; /* Clear all status flags */ in CLOCK_SetFLASHAccessCyclesForFreq()
347 FLASH->DATAW[0] = (FLASH->DATAW[0] & 0xFFFFFFF0UL) | (num_wait_states & 0xFUL); in CLOCK_SetFLASHAccessCyclesForFreq()
349 FLASH->CMD = 0x2; /* CMD_SET_READ_MODE */ in CLOCK_SetFLASHAccessCyclesForFreq()
352 while ((FLASH->INTSTAT & FLASH_INTSTAT_DONE_MASK) == 0UL) in CLOCK_SetFLASHAccessCyclesForFreq()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC5502CPXXXX/drivers/
Dfsl_clock.c354 FLASH->INT_CLR_STATUS = 0x1F; /* Clear all status flags */ in CLOCK_SetFLASHAccessCyclesForFreq()
356 FLASH->DATAW[0] = (FLASH->DATAW[0] & 0xFFFFFFF0UL) | in CLOCK_SetFLASHAccessCyclesForFreq()
359 FLASH->CMD = 0x2; /* CMD_SET_READ_MODE */ in CLOCK_SetFLASHAccessCyclesForFreq()
362 while ((FLASH->INT_STATUS & FLASH_INT_STATUS_DONE_MASK) == 0UL) in CLOCK_SetFLASHAccessCyclesForFreq()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC5504/drivers/
Dfsl_clock.c354 FLASH->INT_CLR_STATUS = 0x1F; /* Clear all status flags */ in CLOCK_SetFLASHAccessCyclesForFreq()
356 FLASH->DATAW[0] = (FLASH->DATAW[0] & 0xFFFFFFF0UL) | in CLOCK_SetFLASHAccessCyclesForFreq()
359 FLASH->CMD = 0x2; /* CMD_SET_READ_MODE */ in CLOCK_SetFLASHAccessCyclesForFreq()
362 while ((FLASH->INT_STATUS & FLASH_INT_STATUS_DONE_MASK) == 0UL) in CLOCK_SetFLASHAccessCyclesForFreq()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC5502/drivers/
Dfsl_clock.c354 FLASH->INT_CLR_STATUS = 0x1F; /* Clear all status flags */ in CLOCK_SetFLASHAccessCyclesForFreq()
356 FLASH->DATAW[0] = (FLASH->DATAW[0] & 0xFFFFFFF0UL) | in CLOCK_SetFLASHAccessCyclesForFreq()
359 FLASH->CMD = 0x2; /* CMD_SET_READ_MODE */ in CLOCK_SetFLASHAccessCyclesForFreq()
362 while ((FLASH->INT_STATUS & FLASH_INT_STATUS_DONE_MASK) == 0UL) in CLOCK_SetFLASHAccessCyclesForFreq()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC55S06/drivers/
Dfsl_clock.c354 FLASH->INT_CLR_STATUS = 0x1F; /* Clear all status flags */ in CLOCK_SetFLASHAccessCyclesForFreq()
356 FLASH->DATAW[0] = (FLASH->DATAW[0] & 0xFFFFFFF0UL) | in CLOCK_SetFLASHAccessCyclesForFreq()
359 FLASH->CMD = 0x2; /* CMD_SET_READ_MODE */ in CLOCK_SetFLASHAccessCyclesForFreq()
362 while ((FLASH->INT_STATUS & FLASH_INT_STATUS_DONE_MASK) == 0UL) in CLOCK_SetFLASHAccessCyclesForFreq()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC5504CPXXXX/drivers/
Dfsl_clock.c354 FLASH->INT_CLR_STATUS = 0x1F; /* Clear all status flags */ in CLOCK_SetFLASHAccessCyclesForFreq()
356 FLASH->DATAW[0] = (FLASH->DATAW[0] & 0xFFFFFFF0UL) | in CLOCK_SetFLASHAccessCyclesForFreq()
359 FLASH->CMD = 0x2; /* CMD_SET_READ_MODE */ in CLOCK_SetFLASHAccessCyclesForFreq()
362 while ((FLASH->INT_STATUS & FLASH_INT_STATUS_DONE_MASK) == 0UL) in CLOCK_SetFLASHAccessCyclesForFreq()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC5506/drivers/
Dfsl_clock.c354 FLASH->INT_CLR_STATUS = 0x1F; /* Clear all status flags */ in CLOCK_SetFLASHAccessCyclesForFreq()
356 FLASH->DATAW[0] = (FLASH->DATAW[0] & 0xFFFFFFF0UL) | in CLOCK_SetFLASHAccessCyclesForFreq()
359 FLASH->CMD = 0x2; /* CMD_SET_READ_MODE */ in CLOCK_SetFLASHAccessCyclesForFreq()
362 while ((FLASH->INT_STATUS & FLASH_INT_STATUS_DONE_MASK) == 0UL) in CLOCK_SetFLASHAccessCyclesForFreq()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC55S04/drivers/
Dfsl_clock.c354 FLASH->INT_CLR_STATUS = 0x1F; /* Clear all status flags */ in CLOCK_SetFLASHAccessCyclesForFreq()
356 FLASH->DATAW[0] = (FLASH->DATAW[0] & 0xFFFFFFF0UL) | in CLOCK_SetFLASHAccessCyclesForFreq()
359 FLASH->CMD = 0x2; /* CMD_SET_READ_MODE */ in CLOCK_SetFLASHAccessCyclesForFreq()
362 while ((FLASH->INT_STATUS & FLASH_INT_STATUS_DONE_MASK) == 0UL) in CLOCK_SetFLASHAccessCyclesForFreq()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC5506CPXXXX/drivers/
Dfsl_clock.c354 FLASH->INT_CLR_STATUS = 0x1F; /* Clear all status flags */ in CLOCK_SetFLASHAccessCyclesForFreq()
356 FLASH->DATAW[0] = (FLASH->DATAW[0] & 0xFFFFFFF0UL) | in CLOCK_SetFLASHAccessCyclesForFreq()
359 FLASH->CMD = 0x2; /* CMD_SET_READ_MODE */ in CLOCK_SetFLASHAccessCyclesForFreq()
362 while ((FLASH->INT_STATUS & FLASH_INT_STATUS_DONE_MASK) == 0UL) in CLOCK_SetFLASHAccessCyclesForFreq()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC5528/drivers/
Dfsl_clock.c374 FLASH->INT_CLR_STATUS = 0x1FUL; /* Clear all status flags */ in CLOCK_SetFLASHAccessCyclesForFreq()
376 FLASH->DATAW[0] = (FLASH->DATAW[0] & 0xFFFFFFF0UL) | in CLOCK_SetFLASHAccessCyclesForFreq()
379 FLASH->CMD = 0x2; /* CMD_SET_READ_MODE */ in CLOCK_SetFLASHAccessCyclesForFreq()
382 while (0UL == (FLASH->INT_STATUS & FLASH_INT_STATUS_DONE_MASK)) in CLOCK_SetFLASHAccessCyclesForFreq()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC55S28/drivers/
Dfsl_clock.c374 FLASH->INT_CLR_STATUS = 0x1FUL; /* Clear all status flags */ in CLOCK_SetFLASHAccessCyclesForFreq()
376 FLASH->DATAW[0] = (FLASH->DATAW[0] & 0xFFFFFFF0UL) | in CLOCK_SetFLASHAccessCyclesForFreq()
379 FLASH->CMD = 0x2; /* CMD_SET_READ_MODE */ in CLOCK_SetFLASHAccessCyclesForFreq()
382 while (0UL == (FLASH->INT_STATUS & FLASH_INT_STATUS_DONE_MASK)) in CLOCK_SetFLASHAccessCyclesForFreq()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC55S69/drivers/
Dfsl_clock.c374 FLASH->INT_CLR_STATUS = 0x1FUL; /* Clear all status flags */ in CLOCK_SetFLASHAccessCyclesForFreq()
376 FLASH->DATAW[0] = (FLASH->DATAW[0] & 0xFFFFFFF0UL) | in CLOCK_SetFLASHAccessCyclesForFreq()
379 FLASH->CMD = 0x2; /* CMD_SET_READ_MODE */ in CLOCK_SetFLASHAccessCyclesForFreq()
382 while (0UL == (FLASH->INT_STATUS & FLASH_INT_STATUS_DONE_MASK)) in CLOCK_SetFLASHAccessCyclesForFreq()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC55S14/drivers/
Dfsl_clock.c357 FLASH->INT_CLR_STATUS = 0x1F; /* Clear all status flags */ in CLOCK_SetFLASHAccessCyclesForFreq()
359 FLASH->DATAW[0] = (FLASH->DATAW[0] & 0xFFFFFFF0UL) | in CLOCK_SetFLASHAccessCyclesForFreq()
362 FLASH->CMD = 0x2; /* CMD_SET_READ_MODE */ in CLOCK_SetFLASHAccessCyclesForFreq()
365 while ((FLASH->INT_STATUS & FLASH_INT_STATUS_DONE_MASK) == 0UL) in CLOCK_SetFLASHAccessCyclesForFreq()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC55S16/drivers/
Dfsl_clock.c357 FLASH->INT_CLR_STATUS = 0x1F; /* Clear all status flags */ in CLOCK_SetFLASHAccessCyclesForFreq()
359 FLASH->DATAW[0] = (FLASH->DATAW[0] & 0xFFFFFFF0UL) | in CLOCK_SetFLASHAccessCyclesForFreq()
362 FLASH->CMD = 0x2; /* CMD_SET_READ_MODE */ in CLOCK_SetFLASHAccessCyclesForFreq()
365 while ((FLASH->INT_STATUS & FLASH_INT_STATUS_DONE_MASK) == 0UL) in CLOCK_SetFLASHAccessCyclesForFreq()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC55S26/drivers/
Dfsl_clock.c374 FLASH->INT_CLR_STATUS = 0x1FUL; /* Clear all status flags */ in CLOCK_SetFLASHAccessCyclesForFreq()
376 FLASH->DATAW[0] = (FLASH->DATAW[0] & 0xFFFFFFF0UL) | in CLOCK_SetFLASHAccessCyclesForFreq()
379 FLASH->CMD = 0x2; /* CMD_SET_READ_MODE */ in CLOCK_SetFLASHAccessCyclesForFreq()
382 while (0UL == (FLASH->INT_STATUS & FLASH_INT_STATUS_DONE_MASK)) in CLOCK_SetFLASHAccessCyclesForFreq()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC5516/drivers/
Dfsl_clock.c357 FLASH->INT_CLR_STATUS = 0x1F; /* Clear all status flags */ in CLOCK_SetFLASHAccessCyclesForFreq()
359 FLASH->DATAW[0] = (FLASH->DATAW[0] & 0xFFFFFFF0UL) | in CLOCK_SetFLASHAccessCyclesForFreq()
362 FLASH->CMD = 0x2; /* CMD_SET_READ_MODE */ in CLOCK_SetFLASHAccessCyclesForFreq()
365 while ((FLASH->INT_STATUS & FLASH_INT_STATUS_DONE_MASK) == 0UL) in CLOCK_SetFLASHAccessCyclesForFreq()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC5526/drivers/
Dfsl_clock.c374 FLASH->INT_CLR_STATUS = 0x1FUL; /* Clear all status flags */ in CLOCK_SetFLASHAccessCyclesForFreq()
376 FLASH->DATAW[0] = (FLASH->DATAW[0] & 0xFFFFFFF0UL) | in CLOCK_SetFLASHAccessCyclesForFreq()
379 FLASH->CMD = 0x2; /* CMD_SET_READ_MODE */ in CLOCK_SetFLASHAccessCyclesForFreq()
382 while (0UL == (FLASH->INT_STATUS & FLASH_INT_STATUS_DONE_MASK)) in CLOCK_SetFLASHAccessCyclesForFreq()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC55S66/drivers/
Dfsl_clock.c374 FLASH->INT_CLR_STATUS = 0x1FUL; /* Clear all status flags */ in CLOCK_SetFLASHAccessCyclesForFreq()
376 FLASH->DATAW[0] = (FLASH->DATAW[0] & 0xFFFFFFF0UL) | in CLOCK_SetFLASHAccessCyclesForFreq()
379 FLASH->CMD = 0x2; /* CMD_SET_READ_MODE */ in CLOCK_SetFLASHAccessCyclesForFreq()
382 while (0UL == (FLASH->INT_STATUS & FLASH_INT_STATUS_DONE_MASK)) in CLOCK_SetFLASHAccessCyclesForFreq()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC5514/drivers/
Dfsl_clock.c357 FLASH->INT_CLR_STATUS = 0x1F; /* Clear all status flags */ in CLOCK_SetFLASHAccessCyclesForFreq()
359 FLASH->DATAW[0] = (FLASH->DATAW[0] & 0xFFFFFFF0UL) | in CLOCK_SetFLASHAccessCyclesForFreq()
362 FLASH->CMD = 0x2; /* CMD_SET_READ_MODE */ in CLOCK_SetFLASHAccessCyclesForFreq()
365 while ((FLASH->INT_STATUS & FLASH_INT_STATUS_DONE_MASK) == 0UL) in CLOCK_SetFLASHAccessCyclesForFreq()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC5512/drivers/
Dfsl_clock.c357 FLASH->INT_CLR_STATUS = 0x1F; /* Clear all status flags */ in CLOCK_SetFLASHAccessCyclesForFreq()
359 FLASH->DATAW[0] = (FLASH->DATAW[0] & 0xFFFFFFF0UL) | in CLOCK_SetFLASHAccessCyclesForFreq()
362 FLASH->CMD = 0x2; /* CMD_SET_READ_MODE */ in CLOCK_SetFLASHAccessCyclesForFreq()
365 while ((FLASH->INT_STATUS & FLASH_INT_STATUS_DONE_MASK) == 0UL) in CLOCK_SetFLASHAccessCyclesForFreq()

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