| /hal_nxp-3.7.0/mcux/mcux-sdk/drivers/flexcan/ |
| D | fsl_flexcan.h | 1435 uint64_t tempflag = (uint64_t)base->ESR1; in FLEXCAN_GetStatusFlags()
1453 return base->ESR1; in FLEXCAN_GetStatusFlags()
1482 base->ESR1 = (uint32_t)(mask & 0xFFFFFFFFU); in FLEXCAN_ClearStatusFlags()
1488 base->ESR1 = mask; in FLEXCAN_ClearStatusFlags()
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| D | fsl_flexcan.c | 463 if (0U == (base->ESR1 & CAN_ESR1_FLTCONF_BUSOFF)) in FLEXCAN_EnterFreezeMode()
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| /hal_nxp-3.7.0/s32/drivers/s32k1/BaseNXP/header/ |
| D | S32K146_FLEXCAN.h | 86 __IO uint32_t ESR1; /**< Error and Status 1 Register, offset: 0x20 */ member
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| D | S32K118_FLEXCAN.h | 86 __IO uint32_t ESR1; /**< Error and Status 1 Register, offset: 0x20 */ member
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| D | S32K142W_FLEXCAN.h | 86 __IO uint32_t ESR1; /**< Error and Status 1 Register, offset: 0x20 */ member
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| D | S32K142_FLEXCAN.h | 86 __IO uint32_t ESR1; /**< Error and Status 1 Register, offset: 0x20 */ member
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| D | S32K144_FLEXCAN.h | 86 __IO uint32_t ESR1; /**< Error and Status 1 Register, offset: 0x20 */ member
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| D | S32K144W_FLEXCAN.h | 86 __IO uint32_t ESR1; /**< Error and Status 1 Register, offset: 0x20 */ member
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| D | S32K148_FLEXCAN.h | 86 __IO uint32_t ESR1; /**< Error and Status 1 Register, offset: 0x20 */ member
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| D | S32K116_FLEXCAN.h | 86 __IO uint32_t ESR1; /**< Error and Status 1 Register, offset: 0x20 */ member
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| /hal_nxp-3.7.0/s32/drivers/s32ze/BaseNXP/header/ |
| D | S32Z2_FLEXCAN.h | 86 __IO uint32_t ESR1; /**< Error and Status 1, offset: 0x20 */ member
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| /hal_nxp-3.7.0/s32/drivers/s32k3/BaseNXP/header/ |
| D | S32K344_FLEXCAN.h | 86 __IO uint32_t ESR1; /**< Error and Status 1 Register, offset: 0x20 */ member
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| /hal_nxp-3.7.0/s32/mcux/devices/S32K344/ |
| D | S32K344_device.h | 29 __IO uint32_t ESR1; /**< Error and Status 1 Register, offset: 0x20 */ member
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| /hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKV11Z7/ |
| D | MKV11Z7.h | 747 __IO uint32_t ESR1; /**< Error and Status 1 register, offset: 0x20 */ member
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| /hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKE18F16/ |
| D | MKE18F16.h | 1619 __IO uint32_t ESR1; /**< Error and Status 1 register, offset: 0x20 */ member
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| /hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKE16F16/ |
| D | MKE16F16.h | 1619 __IO uint32_t ESR1; /**< Error and Status 1 register, offset: 0x20 */ member
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| /hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK22F12/ |
| D | MK22F12.h | 3959 __IO uint32_t ESR1; /**< Error and Status 1 register, offset: 0x20 */ member
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| /hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK24F12/ |
| D | MK24F12.h | 4626 __IO uint32_t ESR1; /**< Error and Status 1 register, offset: 0x20 */ member
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| /hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK63F12/ |
| D | MK63F12.h | 4655 __IO uint32_t ESR1; /**< Error and Status 1 register, offset: 0x20 */ member
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| /hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK64F12/ |
| D | MK64F12.h | 4668 __IO uint32_t ESR1; /**< Error and Status 1 register, offset: 0x20 */ member
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| /hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKV56F24/ |
| D | MKV56F24.h | 4993 __IO uint32_t ESR1; /**< Error and Status 1 register, offset: 0x20 */ member
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| /hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKV58F24/ |
| D | MKV58F24.h | 4993 __IO uint32_t ESR1; /**< Error and Status 1 register, offset: 0x20 */ member
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| /hal_nxp-3.7.0/imx/devices/MCIMX6X/ |
| D | MCIMX6X_M4.h | 3400 …__IO uint32_t ESR1; /**< Error and Status 1 Register, offset: 0… member
3441 #define CAN_ESR1_REG(base) ((base)->ESR1)
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| /hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK65F18/ |
| D | MK65F18.h | 4714 __IO uint32_t ESR1; /**< Error and Status 1 register, offset: 0x20 */ member
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| /hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK66F18/ |
| D | MK66F18.h | 4714 __IO uint32_t ESR1; /**< Error and Status 1 register, offset: 0x20 */ member
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