Home
last modified time | relevance | path

Searched refs:EPDC_WB_FIELD0_TO_MASK (Results 1 – 8 of 8) sorted by relevance

/hal_nxp-3.7.0/imx/devices/MCIMX7D/
DMCIMX7D_M4.h15040 #define EPDC_WB_FIELD0_TO_MASK 0xF0u macro
15042 … (((uint32_t)(((uint32_t)(x))<<EPDC_WB_FIELD0_TO_SHIFT))&EPDC_WB_FIELD0_TO_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8UD3/
DMIMX8UD3_cm33.h14935 #define EPDC_WB_FIELD0_TO_MASK (0xF0U) macro
14937 … (((uint32_t)(((uint32_t)(x)) << EPDC_WB_FIELD0_TO_SHIFT)) & EPDC_WB_FIELD0_TO_MASK)
DMIMX8UD3_dsp0.h14340 #define EPDC_WB_FIELD0_TO_MASK (0xF0U) macro
14342 … (((uint32_t)(((uint32_t)(x)) << EPDC_WB_FIELD0_TO_SHIFT)) & EPDC_WB_FIELD0_TO_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8UD7/
DMIMX8UD7_cm33.h14935 #define EPDC_WB_FIELD0_TO_MASK (0xF0U) macro
14937 … (((uint32_t)(((uint32_t)(x)) << EPDC_WB_FIELD0_TO_SHIFT)) & EPDC_WB_FIELD0_TO_MASK)
DMIMX8UD7_dsp1.h14337 #define EPDC_WB_FIELD0_TO_MASK (0xF0U) macro
14339 … (((uint32_t)(((uint32_t)(x)) << EPDC_WB_FIELD0_TO_SHIFT)) & EPDC_WB_FIELD0_TO_MASK)
DMIMX8UD7_dsp0.h14340 #define EPDC_WB_FIELD0_TO_MASK (0xF0U) macro
14342 … (((uint32_t)(((uint32_t)(x)) << EPDC_WB_FIELD0_TO_SHIFT)) & EPDC_WB_FIELD0_TO_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8US3/
DMIMX8US3_cm33.h14935 #define EPDC_WB_FIELD0_TO_MASK (0xF0U) macro
14937 … (((uint32_t)(((uint32_t)(x)) << EPDC_WB_FIELD0_TO_SHIFT)) & EPDC_WB_FIELD0_TO_MASK)
DMIMX8US3_dsp0.h14340 #define EPDC_WB_FIELD0_TO_MASK (0xF0U) macro
14342 … (((uint32_t)(((uint32_t)(x)) << EPDC_WB_FIELD0_TO_SHIFT)) & EPDC_WB_FIELD0_TO_MASK)