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Searched refs:DMA_INT_INT24_MASK (Results 1 – 25 of 33) sorted by relevance

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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKV56F24/
DMKV56F24.h9027 #define DMA_INT_INT24_MASK (0x1000000U) macro
9033 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT24_SHIFT)) & DMA_INT_INT24_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKV58F24/
DMKV58F24.h9031 #define DMA_INT_INT24_MASK (0x1000000U) macro
9037 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT24_SHIFT)) & DMA_INT_INT24_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK80F25615/
DMK80F25615.h6773 #define DMA_INT_INT24_MASK (0x1000000U) macro
6779 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT24_SHIFT)) & DMA_INT_INT24_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK82F25615/
DMK82F25615.h6767 #define DMA_INT_INT24_MASK (0x1000000U) macro
6773 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT24_SHIFT)) & DMA_INT_INT24_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK27FA15/
DMK27FA15.h6835 #define DMA_INT_INT24_MASK (0x1000000U) macro
6841 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT24_SHIFT)) & DMA_INT_INT24_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK28FA15/
DMK28FA15.h6837 #define DMA_INT_INT24_MASK (0x1000000U) macro
6843 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT24_SHIFT)) & DMA_INT_INT24_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK65F18/
DMK65F18.h8924 #define DMA_INT_INT24_MASK (0x1000000U) macro
8930 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT24_SHIFT)) & DMA_INT_INT24_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK66F18/
DMK66F18.h8924 #define DMA_INT_INT24_MASK (0x1000000U) macro
8930 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT24_SHIFT)) & DMA_INT_INT24_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK26F18/
DMK26F18.h8873 #define DMA_INT_INT24_MASK (0x1000000U) macro
8879 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT24_SHIFT)) & DMA_INT_INT24_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1015/
DMIMXRT1015.h12158 #define DMA_INT_INT24_MASK (0x1000000U) macro
12164 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT24_SHIFT)) & DMA_INT_INT24_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MCIMX7U3/
DMCIMX7U3_cm4.h3980 #define DMA_INT_INT24_MASK (0x1000000U) macro
3986 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT24_SHIFT)) & DMA_INT_INT24_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MCIMX7U5/
DMCIMX7U5_cm4.h3981 #define DMA_INT_INT24_MASK (0x1000000U) macro
3987 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT24_SHIFT)) & DMA_INT_INT24_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1021/
DMIMXRT1021.h13718 #define DMA_INT_INT24_MASK (0x1000000U) macro
13724 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT24_SHIFT)) & DMA_INT_INT24_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1024/
DMIMXRT1024.h13698 #define DMA_INT_INT24_MASK (0x1000000U) macro
13704 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT24_SHIFT)) & DMA_INT_INT24_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1041/
DMIMXRT1041.h15811 #define DMA_INT_INT24_MASK (0x1000000U) macro
15817 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT24_SHIFT)) & DMA_INT_INT24_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1051/
DMIMXRT1051.h14745 #define DMA_INT_INT24_MASK (0x1000000U) macro
14751 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT24_SHIFT)) & DMA_INT_INT24_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1061/
DMIMXRT1061.h16179 #define DMA_INT_INT24_MASK (0x1000000U) macro
16185 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT24_SHIFT)) & DMA_INT_INT24_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1052/
DMIMXRT1052.h15530 #define DMA_INT_INT24_MASK (0x1000000U) macro
15536 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT24_SHIFT)) & DMA_INT_INT24_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1042/
DMIMXRT1042.h15813 #define DMA_INT_INT24_MASK (0x1000000U) macro
15819 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT24_SHIFT)) & DMA_INT_INT24_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1062/
DMIMXRT1062.h16965 #define DMA_INT_INT24_MASK (0x1000000U) macro
16971 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT24_SHIFT)) & DMA_INT_INT24_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1064/
DMIMXRT1064.h17043 #define DMA_INT_INT24_MASK (0x1000000U) macro
17049 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT24_SHIFT)) & DMA_INT_INT24_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1171/
DMIMXRT1171.h27844 #define DMA_INT_INT24_MASK (0x1000000U) macro
27850 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT24_SHIFT)) & DMA_INT_INT24_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1175/
DMIMXRT1175_cm7.h27844 #define DMA_INT_INT24_MASK (0x1000000U) macro
27850 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT24_SHIFT)) & DMA_INT_INT24_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1165/
DMIMXRT1165_cm7.h27532 #define DMA_INT_INT24_MASK (0x1000000U) macro
27538 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT24_SHIFT)) & DMA_INT_INT24_MASK)
DMIMXRT1165_cm4.h27529 #define DMA_INT_INT24_MASK (0x1000000U) macro
27535 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT24_SHIFT)) & DMA_INT_INT24_MASK)

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