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Searched refs:DMA_INT_INT20_MASK (Results 1 – 25 of 33) sorted by relevance

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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKV56F24/
DMKV56F24.h8995 #define DMA_INT_INT20_MASK (0x100000U) macro
9001 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT20_SHIFT)) & DMA_INT_INT20_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKV58F24/
DMKV58F24.h8999 #define DMA_INT_INT20_MASK (0x100000U) macro
9005 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT20_SHIFT)) & DMA_INT_INT20_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK80F25615/
DMK80F25615.h6745 #define DMA_INT_INT20_MASK (0x100000U) macro
6751 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT20_SHIFT)) & DMA_INT_INT20_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK82F25615/
DMK82F25615.h6739 #define DMA_INT_INT20_MASK (0x100000U) macro
6745 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT20_SHIFT)) & DMA_INT_INT20_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK27FA15/
DMK27FA15.h6807 #define DMA_INT_INT20_MASK (0x100000U) macro
6813 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT20_SHIFT)) & DMA_INT_INT20_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK28FA15/
DMK28FA15.h6809 #define DMA_INT_INT20_MASK (0x100000U) macro
6815 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT20_SHIFT)) & DMA_INT_INT20_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK65F18/
DMK65F18.h8892 #define DMA_INT_INT20_MASK (0x100000U) macro
8898 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT20_SHIFT)) & DMA_INT_INT20_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK66F18/
DMK66F18.h8892 #define DMA_INT_INT20_MASK (0x100000U) macro
8898 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT20_SHIFT)) & DMA_INT_INT20_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK26F18/
DMK26F18.h8841 #define DMA_INT_INT20_MASK (0x100000U) macro
8847 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT20_SHIFT)) & DMA_INT_INT20_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1015/
DMIMXRT1015.h12126 #define DMA_INT_INT20_MASK (0x100000U) macro
12132 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT20_SHIFT)) & DMA_INT_INT20_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MCIMX7U3/
DMCIMX7U3_cm4.h3952 #define DMA_INT_INT20_MASK (0x100000U) macro
3958 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT20_SHIFT)) & DMA_INT_INT20_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MCIMX7U5/
DMCIMX7U5_cm4.h3953 #define DMA_INT_INT20_MASK (0x100000U) macro
3959 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT20_SHIFT)) & DMA_INT_INT20_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1021/
DMIMXRT1021.h13686 #define DMA_INT_INT20_MASK (0x100000U) macro
13692 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT20_SHIFT)) & DMA_INT_INT20_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1024/
DMIMXRT1024.h13666 #define DMA_INT_INT20_MASK (0x100000U) macro
13672 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT20_SHIFT)) & DMA_INT_INT20_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1041/
DMIMXRT1041.h15779 #define DMA_INT_INT20_MASK (0x100000U) macro
15785 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT20_SHIFT)) & DMA_INT_INT20_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1051/
DMIMXRT1051.h14713 #define DMA_INT_INT20_MASK (0x100000U) macro
14719 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT20_SHIFT)) & DMA_INT_INT20_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1061/
DMIMXRT1061.h16147 #define DMA_INT_INT20_MASK (0x100000U) macro
16153 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT20_SHIFT)) & DMA_INT_INT20_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1052/
DMIMXRT1052.h15498 #define DMA_INT_INT20_MASK (0x100000U) macro
15504 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT20_SHIFT)) & DMA_INT_INT20_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1042/
DMIMXRT1042.h15781 #define DMA_INT_INT20_MASK (0x100000U) macro
15787 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT20_SHIFT)) & DMA_INT_INT20_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1062/
DMIMXRT1062.h16933 #define DMA_INT_INT20_MASK (0x100000U) macro
16939 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT20_SHIFT)) & DMA_INT_INT20_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1064/
DMIMXRT1064.h17011 #define DMA_INT_INT20_MASK (0x100000U) macro
17017 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT20_SHIFT)) & DMA_INT_INT20_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1171/
DMIMXRT1171.h27812 #define DMA_INT_INT20_MASK (0x100000U) macro
27818 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT20_SHIFT)) & DMA_INT_INT20_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1175/
DMIMXRT1175_cm7.h27812 #define DMA_INT_INT20_MASK (0x100000U) macro
27818 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT20_SHIFT)) & DMA_INT_INT20_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1165/
DMIMXRT1165_cm7.h27500 #define DMA_INT_INT20_MASK (0x100000U) macro
27506 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT20_SHIFT)) & DMA_INT_INT20_MASK)
DMIMXRT1165_cm4.h27497 #define DMA_INT_INT20_MASK (0x100000U) macro
27503 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT20_SHIFT)) & DMA_INT_INT20_MASK)

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