/hal_nxp-3.7.0/mcux/mcux-sdk/components/audio/ |
D | fsl_adapter_sai.c | 247 IRQn_Type dmaIrqNumber[][FSL_FEATURE_EDMA_MODULE_CHANNEL] = DMA_CHN_IRQS; in HAL_AudioCommonInit() 258 IRQn_Type dmaIrqNumber[][FSL_FEATURE_DMA_MODULE_CHANNEL] = DMA_CHN_IRQS; in HAL_AudioCommonInit()
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/hal_nxp-3.7.0/mcux/mcux-sdk/components/spi/ |
D | fsl_adapter_lpspi.c | 618 IRQn_Type s_edmaIRQNumbers[][FSL_FEATURE_EDMA_MODULE_CHANNEL] = DMA_CHN_IRQS; in HAL_SpiSlaveDMAInit() 707 IRQn_Type s_edmaIRQNumbers[][FSL_FEATURE_EDMA_MODULE_CHANNEL] = DMA_CHN_IRQS; in HAL_SpiMasterDMAInit()
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/hal_nxp-3.7.0/mcux/mcux-sdk/drivers/dma/ |
D | fsl_dma.c | 44 static const IRQn_Type s_dmaIRQNumber[][FSL_FEATURE_DMA_MODULE_CHANNEL] = DMA_CHN_IRQS;
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/hal_nxp-3.7.0/mcux/mcux-sdk/components/uart/ |
D | fsl_adapter_lpuart.c | 43 #define DMA_CHN_IRQS DMA_IRQS macro 1877 IRQn_Type s_edmaIRQNumbers[][FSL_FEATURE_EDMA_MODULE_CHANNEL] = DMA_CHN_IRQS; in HAL_UartDMAInit() 1880 IRQn_Type s_edmaIRQNumbers[][FSL_FEATURE_EDMA_MODULE_CHANNEL] = DMA_CHN_IRQS; in HAL_UartDMAInit()
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/hal_nxp-3.7.0/mcux/mcux-sdk/drivers/edma/ |
D | fsl_edma.c | 54 static const IRQn_Type s_edmaIRQNumber[][FSL_FEATURE_EDMA_MODULE_CHANNEL] = DMA_CHN_IRQS;
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKL25Z4/ |
D | MKL25Z4.h | 993 #define DMA_CHN_IRQS { { DMA0_IRQn, DMA1_IRQn, DMA2_IRQn, DMA3_IRQn } } macro
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKL17Z644/ |
D | MKL17Z644.h | 1550 #define DMA_CHN_IRQS { { DMA0_IRQn, DMA1_IRQn, DMA2_IRQn, DMA3_IRQn } } macro
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKL27Z644/ |
D | MKL27Z644.h | 1559 #define DMA_CHN_IRQS { { DMA0_IRQn, DMA1_IRQn, DMA2_IRQn, DMA3_IRQn } } macro
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKV10Z7/ |
D | MKV10Z7.h | 2415 #define DMA_CHN_IRQS { { DMA0_IRQn, DMA1_IRQn, DMA2_IRQn, DMA3_IRQn } } macro
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKV30F12810/ |
D | MKV30F12810.h | 2511 #define DMA_CHN_IRQS { { DMA0_IRQn, DMA1_IRQn, DMA2_IRQn, DMA3_IRQn } } macro
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK02F12810/ |
D | MK02F12810.h | 2507 #define DMA_CHN_IRQS { { DMA0_IRQn, DMA1_IRQn, DMA2_IRQn, DMA3_IRQn } } macro
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKV31F12810/ |
D | MKV31F12810.h | 2531 #define DMA_CHN_IRQS { { DMA0_IRQn, DMA1_IRQn, DMA2_IRQn, DMA3_IRQn } } macro
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKV10Z1287/ |
D | MKV10Z1287.h | 2669 #define DMA_CHN_IRQS { { DMA0_DMA4_IRQn, DMA1_DMA5_IRQn, DMA2_DMA6_IRQn… macro
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKE12Z7/ |
D | MKE12Z7.h | 3123 #define DMA_CHN_IRQS { { DMA0_04_IRQn, DMA0_15_IRQn, DMA0_26_IRQn, DMA0… macro
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKM14ZA5/ |
D | MKM14ZA5.h | 4025 #define DMA_CHN_IRQS { { DMA0_IRQn, DMA1_IRQn, DMA2_IRQn, DMA3_IRQn } } macro
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKV11Z7/ |
D | MKV11Z7.h | 3456 #define DMA_CHN_IRQS { { DMA0_DMA4_IRQn, DMA1_DMA5_IRQn, DMA2_DMA6_IRQn… macro
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKE12Z9/ |
D | MKE12Z9.h | 3043 #define DMA_CHN_IRQS { { DMA0_04_IRQn, DMA0_15_IRQn, DMA0_26_IRQn, DMA0… macro
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKE13Z7/ |
D | MKE13Z7.h | 3124 #define DMA_CHN_IRQS { { DMA0_04_IRQn, DMA0_15_IRQn, DMA0_26_IRQn, DMA0… macro
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKV31F51212/ |
D | MKV31F51212.h | 3298 #define DMA_CHN_IRQS { { DMA0_IRQn, DMA1_IRQn, DMA2_IRQn, DMA3_IRQn, DM… macro
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKV31F25612/ |
D | MKV31F25612.h | 3294 #define DMA_CHN_IRQS { { DMA0_IRQn, DMA1_IRQn, DMA2_IRQn, DMA3_IRQn, DM… macro
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKE17Z7/ |
D | MKE17Z7.h | 3125 #define DMA_CHN_IRQS { { DMA0_04_IRQn, DMA0_15_IRQn, DMA0_26_IRQn, DMA0… macro
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKE17Z9/ |
D | MKE17Z9.h | 3045 #define DMA_CHN_IRQS { { DMA0_04_IRQn, DMA0_15_IRQn, DMA0_26_IRQn, DMA0… macro
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKE13Z9/ |
D | MKE13Z9.h | 3044 #define DMA_CHN_IRQS { { DMA0_04_IRQn, DMA0_15_IRQn, DMA0_26_IRQn, DMA0… macro
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/K32L2B31A/ |
D | K32L2B31A.h | 1538 #define DMA_CHN_IRQS \ macro
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK22F12810/ |
D | MK22F12810.h | 2533 #define DMA_CHN_IRQS { { DMA0_IRQn, DMA1_IRQn, DMA2_IRQn, DMA3_IRQn } } macro
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