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Searched refs:DBG_INTR_SRC (Results 1 – 1 of 1) sorted by relevance

/hal_nxp-3.7.0/imx/devices/MCIMX7D/
DMCIMX7D_M4.h29821 __IO uint32_t DBG_INTR_SRC; /**< Debug Interrupt Mask, offset: 0xC8 */ member
29854 #define MIPI_CSI2_DBG_INTR_SRC_REG(base) ((base)->DBG_INTR_SRC)