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Searched refs:CMP_C1_VRSEL_MASK (Results 1 – 25 of 55) sorted by relevance

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/hal_nxp-3.7.0/s32/drivers/s32k1/BaseNXP/header/
DS32K146_CMP.h207 #define CMP_C1_VRSEL_MASK (0x4000U) macro
210 … (((uint32_t)(((uint32_t)(x)) << CMP_C1_VRSEL_SHIFT)) & CMP_C1_VRSEL_MASK)
DS32K118_CMP.h207 #define CMP_C1_VRSEL_MASK (0x4000U) macro
210 … (((uint32_t)(((uint32_t)(x)) << CMP_C1_VRSEL_SHIFT)) & CMP_C1_VRSEL_MASK)
DS32K142W_CMP.h207 #define CMP_C1_VRSEL_MASK (0x4000U) macro
210 … (((uint32_t)(((uint32_t)(x)) << CMP_C1_VRSEL_SHIFT)) & CMP_C1_VRSEL_MASK)
DS32K144W_CMP.h207 #define CMP_C1_VRSEL_MASK (0x4000U) macro
210 … (((uint32_t)(((uint32_t)(x)) << CMP_C1_VRSEL_SHIFT)) & CMP_C1_VRSEL_MASK)
DS32K142_CMP.h207 #define CMP_C1_VRSEL_MASK (0x4000U) macro
210 … (((uint32_t)(((uint32_t)(x)) << CMP_C1_VRSEL_SHIFT)) & CMP_C1_VRSEL_MASK)
DS32K144_CMP.h207 #define CMP_C1_VRSEL_MASK (0x4000U) macro
210 … (((uint32_t)(((uint32_t)(x)) << CMP_C1_VRSEL_SHIFT)) & CMP_C1_VRSEL_MASK)
DS32K148_CMP.h207 #define CMP_C1_VRSEL_MASK (0x4000U) macro
210 … (((uint32_t)(((uint32_t)(x)) << CMP_C1_VRSEL_SHIFT)) & CMP_C1_VRSEL_MASK)
DS32K116_CMP.h207 #define CMP_C1_VRSEL_MASK (0x4000U) macro
210 … (((uint32_t)(((uint32_t)(x)) << CMP_C1_VRSEL_SHIFT)) & CMP_C1_VRSEL_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/drivers/acmp/
Dfsl_acmp.c368 tmp32 = (base->C1 & (~(CMP_C1_VRSEL_MASK | CMP_C1_VOSEL_MASK))); in ACMP_SetDACConfig()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKE14Z4/
DMKE14Z4.h926 #define CMP_C1_VRSEL_MASK (0x4000U) macro
932 … (((uint32_t)(((uint32_t)(x)) << CMP_C1_VRSEL_SHIFT)) & CMP_C1_VRSEL_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKE15Z4/
DMKE15Z4.h927 #define CMP_C1_VRSEL_MASK (0x4000U) macro
933 … (((uint32_t)(((uint32_t)(x)) << CMP_C1_VRSEL_SHIFT)) & CMP_C1_VRSEL_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKE12Z7/
DMKE12Z7.h1103 #define CMP_C1_VRSEL_MASK (0x4000U) macro
1109 … (((uint32_t)(((uint32_t)(x)) << CMP_C1_VRSEL_SHIFT)) & CMP_C1_VRSEL_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKE16Z4/
DMKE16Z4.h925 #define CMP_C1_VRSEL_MASK (0x4000U) macro
931 … (((uint32_t)(((uint32_t)(x)) << CMP_C1_VRSEL_SHIFT)) & CMP_C1_VRSEL_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKE12Z9/
DMKE12Z9.h1108 #define CMP_C1_VRSEL_MASK (0x4000U) macro
1114 … (((uint32_t)(((uint32_t)(x)) << CMP_C1_VRSEL_SHIFT)) & CMP_C1_VRSEL_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKE13Z7/
DMKE13Z7.h1104 #define CMP_C1_VRSEL_MASK (0x4000U) macro
1110 … (((uint32_t)(((uint32_t)(x)) << CMP_C1_VRSEL_SHIFT)) & CMP_C1_VRSEL_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKE17Z7/
DMKE17Z7.h1105 #define CMP_C1_VRSEL_MASK (0x4000U) macro
1111 … (((uint32_t)(((uint32_t)(x)) << CMP_C1_VRSEL_SHIFT)) & CMP_C1_VRSEL_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKE17Z9/
DMKE17Z9.h1110 #define CMP_C1_VRSEL_MASK (0x4000U) macro
1116 … (((uint32_t)(((uint32_t)(x)) << CMP_C1_VRSEL_SHIFT)) & CMP_C1_VRSEL_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKE13Z9/
DMKE13Z9.h1109 #define CMP_C1_VRSEL_MASK (0x4000U) macro
1115 … (((uint32_t)(((uint32_t)(x)) << CMP_C1_VRSEL_SHIFT)) & CMP_C1_VRSEL_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKE14Z7/
DMKE14Z7.h1044 #define CMP_C1_VRSEL_MASK (0x4000U) macro
1050 … (((uint32_t)(((uint32_t)(x)) << CMP_C1_VRSEL_SHIFT)) & CMP_C1_VRSEL_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKE15Z7/
DMKE15Z7.h1045 #define CMP_C1_VRSEL_MASK (0x4000U) macro
1051 … (((uint32_t)(((uint32_t)(x)) << CMP_C1_VRSEL_SHIFT)) & CMP_C1_VRSEL_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKE14F16/
DMKE14F16.h1806 #define CMP_C1_VRSEL_MASK (0x4000U) macro
1812 … (((uint32_t)(((uint32_t)(x)) << CMP_C1_VRSEL_SHIFT)) & CMP_C1_VRSEL_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKE18F16/
DMKE18F16.h2808 #define CMP_C1_VRSEL_MASK (0x4000U) macro
2814 … (((uint32_t)(((uint32_t)(x)) << CMP_C1_VRSEL_SHIFT)) & CMP_C1_VRSEL_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKE16F16/
DMKE16F16.h2804 #define CMP_C1_VRSEL_MASK (0x4000U) macro
2810 … (((uint32_t)(((uint32_t)(x)) << CMP_C1_VRSEL_SHIFT)) & CMP_C1_VRSEL_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT685S/
DMIMXRT685S_dsp.h4792 #define CMP_C1_VRSEL_MASK (0x200U) macro
4798 … (((uint32_t)(((uint32_t)(x)) << CMP_C1_VRSEL_SHIFT)) & CMP_C1_VRSEL_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MCIMX7U3/
DMCIMX7U3_cm4.h2012 #define CMP_C1_VRSEL_MASK (0x200U) macro
2018 … (((uint32_t)(((uint32_t)(x)) << CMP_C1_VRSEL_SHIFT)) & CMP_C1_VRSEL_MASK)

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