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Searched refs:CLOCK_IP_HAS_P1_SYS_DIV4_CLK (Results 1 – 4 of 4) sorted by relevance

/hal_nxp-3.7.0/s32/soc/s32z270/include/
DClock_Ip_Cfg_Defines.h227 #define CLOCK_IP_HAS_P1_SYS_DIV4_CLK 44U macro
/hal_nxp-3.7.0/s32/drivers/s32ze/Mcu/include/
DClock_Ip_Types.h875 #if defined(CLOCK_IP_HAS_P1_SYS_DIV4_CLK)
876 P1_SYS_DIV4_CLK = CLOCK_IP_HAS_P1_SYS_DIV4_CLK,
/hal_nxp-3.7.0/s32/drivers/s32k3/Mcu/include/
DClock_Ip_Types.h865 #if defined(CLOCK_IP_HAS_P1_SYS_DIV4_CLK)
866 P1_SYS_DIV4_CLK = CLOCK_IP_HAS_P1_SYS_DIV4_CLK,
/hal_nxp-3.7.0/s32/drivers/s32k1/Mcu/include/
DClock_Ip_Types.h955 #if defined(CLOCK_IP_HAS_P1_SYS_DIV4_CLK)
956 P1_SYS_DIV4_CLK = CLOCK_IP_HAS_P1_SYS_DIV4_CLK,