| /hal_nxp-3.7.0/s32/drivers/s32k3/Fls/src/ |
| D | Qspi_Ip_Controller.c | 1954 BaseAddr->BUF2CR = (uint32)0x00000001UL; in Qspi_Ip_ResetAllRegisters()
2019 BaseAddr->BUF2CR = (uint32)0x00000001UL; in Qspi_Ip_ResetAllRegisters()
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| /hal_nxp-3.7.0/s32/drivers/s32k1/BaseNXP/header/ |
| D | S32K148_QUADSPI.h | 83 …__IO uint32_t BUF2CR; /**< Buffer2 Configuration Register, offset: 0x18… member
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| /hal_nxp-3.7.0/s32/drivers/s32k3/BaseNXP/header/ |
| D | S32K344_QUADSPI.h | 83 …__IO uint32_t BUF2CR; /**< Buffer 2 Configuration Register, offset: 0x1… member
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| /hal_nxp-3.7.0/s32/drivers/s32k3/Fls/include/ |
| D | Qspi_Ip_HwAccess.h | 585 BaseAddr->BUF2CR = QuadSPI_BUF2CR_ADATSZ((uint32)Size >> 3U) in Qspi_Ip_SetAhbBuf2()
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| /hal_nxp-3.7.0/s32/drivers/s32ze/BaseNXP/header/ |
| D | S32Z2_QUADSPI.h | 85 …__IO uint32_t BUF2CR; /**< Buffer 2 Configuration Register, offset: 0x1… member
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| /hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK80F25615/ |
| D | MK80F25615.h | 18261 …__IO uint32_t BUF2CR; /**< Buffer2 Configuration Register, offset: 0x18… member
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| /hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK82F25615/ |
| D | MK82F25615.h | 19234 …__IO uint32_t BUF2CR; /**< Buffer2 Configuration Register, offset: 0x18… member
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| /hal_nxp-3.7.0/imx/devices/MCIMX6X/ |
| D | MCIMX6X_M4.h | 30420 …__IO uint32_t BUF2CR; /**< Buffer2 Configuration Register, offset… member
30471 #define QuadSPI_BUF2CR_REG(base) ((base)->BUF2CR)
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| /hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK27FA15/ |
| D | MK27FA15.h | 17763 …__IO uint32_t BUF2CR; /**< Buffer2 Configuration Register, offset: 0x18… member
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| /hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK28FA15/ |
| D | MK28FA15.h | 17765 …__IO uint32_t BUF2CR; /**< Buffer2 Configuration Register, offset: 0x18… member
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| /hal_nxp-3.7.0/imx/devices/MCIMX7D/ |
| D | MCIMX7D_M4.h | 37618 …__IO uint32_t BUF2CR; /**< Buffer2 Configuration Register, offset… member
37669 #define QuadSPI_BUF2CR_REG(base) ((base)->BUF2CR)
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| /hal_nxp-3.7.0/mcux/mcux-sdk/devices/MCIMX7U3/ |
| D | MCIMX7U3_cm4.h | 25104 …__IO uint32_t BUF2CR; /**< Buffer2 Configuration Register, offset: 0x18… member
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| /hal_nxp-3.7.0/mcux/mcux-sdk/devices/MCIMX7U5/ |
| D | MCIMX7U5_cm4.h | 25105 …__IO uint32_t BUF2CR; /**< Buffer2 Configuration Register, offset: 0x18… member
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| /hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MQ5/ |
| D | MIMX8MQ5_cm4.h | 43994 …__IO uint32_t BUF2CR; /**< Buffer2 Configuration Register, offset: 0x18… member
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| /hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MQ7/ |
| D | MIMX8MQ7_cm4.h | 46167 …__IO uint32_t BUF2CR; /**< Buffer2 Configuration Register, offset: 0x18… member
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| /hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MD7/ |
| D | MIMX8MD7_cm4.h | 46167 …__IO uint32_t BUF2CR; /**< Buffer2 Configuration Register, offset: 0x18… member
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| /hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MD6/ |
| D | MIMX8MD6_cm4.h | 46167 …__IO uint32_t BUF2CR; /**< Buffer2 Configuration Register, offset: 0x18… member
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| /hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MQ6/ |
| D | MIMX8MQ6_cm4.h | 46167 …__IO uint32_t BUF2CR; /**< Buffer2 Configuration Register, offset: 0x18… member
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