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Searched refs:AIPS_PACRD_TP0_MASK (Results 1 – 21 of 21) sorted by relevance

/hal_nxp-3.7.0/s32/drivers/s32k1/BaseNXP/header/
DS32K144W_AIPS.h258 #define AIPS_PACRD_TP0_MASK (0x10000000U) macro
261 … (((uint32_t)(((uint32_t)(x)) << AIPS_PACRD_TP0_SHIFT)) & AIPS_PACRD_TP0_MASK)
DS32K146_AIPS.h258 #define AIPS_PACRD_TP0_MASK (0x10000000U) macro
261 … (((uint32_t)(((uint32_t)(x)) << AIPS_PACRD_TP0_SHIFT)) & AIPS_PACRD_TP0_MASK)
DS32K118_AIPS.h258 #define AIPS_PACRD_TP0_MASK (0x10000000U) macro
261 … (((uint32_t)(((uint32_t)(x)) << AIPS_PACRD_TP0_SHIFT)) & AIPS_PACRD_TP0_MASK)
DS32K142_AIPS.h258 #define AIPS_PACRD_TP0_MASK (0x10000000U) macro
261 … (((uint32_t)(((uint32_t)(x)) << AIPS_PACRD_TP0_SHIFT)) & AIPS_PACRD_TP0_MASK)
DS32K144_AIPS.h258 #define AIPS_PACRD_TP0_MASK (0x10000000U) macro
261 … (((uint32_t)(((uint32_t)(x)) << AIPS_PACRD_TP0_SHIFT)) & AIPS_PACRD_TP0_MASK)
DS32K142W_AIPS.h258 #define AIPS_PACRD_TP0_MASK (0x10000000U) macro
261 … (((uint32_t)(((uint32_t)(x)) << AIPS_PACRD_TP0_SHIFT)) & AIPS_PACRD_TP0_MASK)
DS32K116_AIPS.h258 #define AIPS_PACRD_TP0_MASK (0x10000000U) macro
261 … (((uint32_t)(((uint32_t)(x)) << AIPS_PACRD_TP0_SHIFT)) & AIPS_PACRD_TP0_MASK)
DS32K148_AIPS.h273 #define AIPS_PACRD_TP0_MASK (0x10000000U) macro
276 … (((uint32_t)(((uint32_t)(x)) << AIPS_PACRD_TP0_SHIFT)) & AIPS_PACRD_TP0_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK22F12/
DMK22F12.h1560 #define AIPS_PACRD_TP0_MASK (0x10000000U) macro
1566 … (((uint32_t)(((uint32_t)(x)) << AIPS_PACRD_TP0_SHIFT)) & AIPS_PACRD_TP0_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK24F12/
DMK24F12.h1869 #define AIPS_PACRD_TP0_MASK (0x10000000U) macro
1875 … (((uint32_t)(((uint32_t)(x)) << AIPS_PACRD_TP0_SHIFT)) & AIPS_PACRD_TP0_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK63F12/
DMK63F12.h1864 #define AIPS_PACRD_TP0_MASK (0x10000000U) macro
1870 … (((uint32_t)(((uint32_t)(x)) << AIPS_PACRD_TP0_SHIFT)) & AIPS_PACRD_TP0_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK64F12/
DMK64F12.h1877 #define AIPS_PACRD_TP0_MASK (0x10000000U) macro
1883 … (((uint32_t)(((uint32_t)(x)) << AIPS_PACRD_TP0_SHIFT)) & AIPS_PACRD_TP0_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKV56F24/
DMKV56F24.h2101 #define AIPS_PACRD_TP0_MASK (0x10000000U) macro
2107 … (((uint32_t)(((uint32_t)(x)) << AIPS_PACRD_TP0_SHIFT)) & AIPS_PACRD_TP0_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKV58F24/
DMKV58F24.h2101 #define AIPS_PACRD_TP0_MASK (0x10000000U) macro
2107 … (((uint32_t)(((uint32_t)(x)) << AIPS_PACRD_TP0_SHIFT)) & AIPS_PACRD_TP0_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK80F25615/
DMK80F25615.h1733 #define AIPS_PACRD_TP0_MASK (0x10000000U) macro
1739 … (((uint32_t)(((uint32_t)(x)) << AIPS_PACRD_TP0_SHIFT)) & AIPS_PACRD_TP0_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK82F25615/
DMK82F25615.h1727 #define AIPS_PACRD_TP0_MASK (0x10000000U) macro
1733 … (((uint32_t)(((uint32_t)(x)) << AIPS_PACRD_TP0_SHIFT)) & AIPS_PACRD_TP0_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK27FA15/
DMK27FA15.h1726 #define AIPS_PACRD_TP0_MASK (0x10000000U) macro
1732 … (((uint32_t)(((uint32_t)(x)) << AIPS_PACRD_TP0_SHIFT)) & AIPS_PACRD_TP0_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK28FA15/
DMK28FA15.h1728 #define AIPS_PACRD_TP0_MASK (0x10000000U) macro
1734 … (((uint32_t)(((uint32_t)(x)) << AIPS_PACRD_TP0_SHIFT)) & AIPS_PACRD_TP0_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK65F18/
DMK65F18.h1941 #define AIPS_PACRD_TP0_MASK (0x10000000U) macro
1947 … (((uint32_t)(((uint32_t)(x)) << AIPS_PACRD_TP0_SHIFT)) & AIPS_PACRD_TP0_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK66F18/
DMK66F18.h1941 #define AIPS_PACRD_TP0_MASK (0x10000000U) macro
1947 … (((uint32_t)(((uint32_t)(x)) << AIPS_PACRD_TP0_SHIFT)) & AIPS_PACRD_TP0_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK26F18/
DMK26F18.h1924 #define AIPS_PACRD_TP0_MASK (0x10000000U) macro
1930 … (((uint32_t)(((uint32_t)(x)) << AIPS_PACRD_TP0_SHIFT)) & AIPS_PACRD_TP0_MASK)