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Searched refs:AIPS0 (Results 1 – 13 of 13) sorted by relevance

/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK22F12/
DMK22F12.h3657 #define AIPS0 ((AIPS_Type *)AIPS0_BASE) macro
3665 #define AIPS_BASE_PTRS { AIPS0, AIPS1 }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK24F12/
DMK24F12.h4308 #define AIPS0 ((AIPS_Type *)AIPS0_BASE) macro
4316 #define AIPS_BASE_PTRS { AIPS0, AIPS1 }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK63F12/
DMK63F12.h4303 #define AIPS0 ((AIPS_Type *)AIPS0_BASE) macro
4311 #define AIPS_BASE_PTRS { AIPS0, AIPS1 }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK64F12/
DMK64F12.h4316 #define AIPS0 ((AIPS_Type *)AIPS0_BASE) macro
4324 #define AIPS_BASE_PTRS { AIPS0, AIPS1 }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKV56F24/
DMKV56F24.h4488 #define AIPS0 ((AIPS_Type *)AIPS0_BASE) macro
4496 #define AIPS_BASE_PTRS { AIPS0, AIPS1 }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKV58F24/
DMKV58F24.h4488 #define AIPS0 ((AIPS_Type *)AIPS0_BASE) macro
4496 #define AIPS_BASE_PTRS { AIPS0, AIPS1 }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK80F25615/
DMK80F25615.h3830 #define AIPS0 ((AIPS_Type *)AIPS0_BASE) macro
3838 #define AIPS_BASE_PTRS { AIPS0, AIPS1 }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK82F25615/
DMK82F25615.h3824 #define AIPS0 ((AIPS_Type *)AIPS0_BASE) macro
3832 #define AIPS_BASE_PTRS { AIPS0, AIPS1 }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK27FA15/
DMK27FA15.h3823 #define AIPS0 ((AIPS_Type *)AIPS0_BASE) macro
3831 #define AIPS_BASE_PTRS { AIPS0, AIPS1 }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK28FA15/
DMK28FA15.h3825 #define AIPS0 ((AIPS_Type *)AIPS0_BASE) macro
3833 #define AIPS_BASE_PTRS { AIPS0, AIPS1 }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK65F18/
DMK65F18.h4328 #define AIPS0 ((AIPS_Type *)AIPS0_BASE) macro
4336 #define AIPS_BASE_PTRS { AIPS0, AIPS1 }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK66F18/
DMK66F18.h4328 #define AIPS0 ((AIPS_Type *)AIPS0_BASE) macro
4336 #define AIPS_BASE_PTRS { AIPS0, AIPS1 }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK26F18/
DMK26F18.h4311 #define AIPS0 ((AIPS_Type *)AIPS0_BASE) macro
4319 #define AIPS_BASE_PTRS { AIPS0, AIPS1 }