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Searched refs:ADC_CH_SW_CFG_REG (Results 1 – 2 of 2) sorted by relevance

/hal_nxp-3.7.0/imx/drivers/
Dadc_imx7d.c91 ADC_CH_SW_CFG_REG(base) = 0x0; in ADC_Deinit()
231 ADC_CH_SW_CFG_REG(base) = 0x0; in ADC_LogicChDeinit()
267 ADC_CH_SW_CFG_REG(base) = (ADC_CH_SW_CFG_REG(base) & ~ADC_CH_SW_CFG_CH_SW_SEL_MASK) | \ in ADC_SelectInputCh()
343 ADC_CH_SW_CFG_REG(base) |= ADC_CH_SW_CFG_CH_SW_AVG_EN_MASK; in ADC_SetAverageCmd()
366 ADC_CH_SW_CFG_REG(base) &= ~ADC_CH_SW_CFG_CH_SW_AVG_EN_MASK; in ADC_SetAverageCmd()
404ADC_CH_SW_CFG_REG(base) = (ADC_CH_SW_CFG_REG(base) & ~ADC_CH_SW_CFG_CH_SW_AVG_NUMBER_MASK) | \ in ADC_SetAverageNum()
496 ADC_CH_SW_CFG_REG(base) |= ADC_CH_SW_CFG_START_CONV_MASK; in ADC_TriggerSingleConvert()
529 while (ADC_CH_SW_CFG_REG(base) & ADC_CH_SW_CFG_START_CONV_MASK); in ADC_StopConvert()
/hal_nxp-3.7.0/imx/devices/MCIMX7D/
DMCIMX7D_M4.h370 #define ADC_CH_SW_CFG_REG(base) ((base)->CH_SW_CFG) macro
739 #define ADC1_CH_SW_CFG ADC_CH_SW_CFG_REG(ADC1_BASE_PTR)
760 #define ADC2_CH_SW_CFG ADC_CH_SW_CFG_REG(ADC2_BASE_PTR)