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Searched refs:startAddr (Results 1 – 23 of 23) sorted by relevance

/hal_nxp-3.6.0/mcux/mcux-sdk/drivers/cache/lmem/
Dfsl_cache.c88 uint32_t startAddr = address & ~((uint32_t)L1CODEBUSCACHE_LINESIZE_BYTE - 1U); in L1CACHE_InvalidateCodeCacheByRange() local
94 while (startAddr < endAddr) in L1CACHE_InvalidateCodeCacheByRange()
97 LMEM->PCCSAR = (startAddr & LMEM_PCCSAR_PHYADDR_MASK) | LMEM_PCCSAR_LGO_MASK; in L1CACHE_InvalidateCodeCacheByRange()
103 startAddr += (uint32_t)L1CODEBUSCACHE_LINESIZE_BYTE; in L1CACHE_InvalidateCodeCacheByRange()
140 uint32_t startAddr = address & ~((uint32_t)L1CODEBUSCACHE_LINESIZE_BYTE - 1U); in L1CACHE_CleanCodeCacheByRange() local
146 while (startAddr < endAddr) in L1CACHE_CleanCodeCacheByRange()
149 LMEM->PCCSAR = (startAddr & LMEM_PCCSAR_PHYADDR_MASK) | LMEM_PCCSAR_LGO_MASK; in L1CACHE_CleanCodeCacheByRange()
155 startAddr += (uint32_t)L1CODEBUSCACHE_LINESIZE_BYTE; in L1CACHE_CleanCodeCacheByRange()
193 uint32_t startAddr = address & ~((uint32_t)L1CODEBUSCACHE_LINESIZE_BYTE - 1U); in L1CACHE_CleanInvalidateCodeCacheByRange() local
199 while (startAddr < endAddr) in L1CACHE_CleanInvalidateCodeCacheByRange()
[all …]
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1173/drivers/cm4/
Dfsl_cache.c88 uint32_t startAddr = address & ~((uint32_t)L1CODEBUSCACHE_LINESIZE_BYTE - 1U); in L1CACHE_InvalidateCodeCacheByRange() local
94 while (startAddr < endAddr) in L1CACHE_InvalidateCodeCacheByRange()
97 LMEM->PCCSAR = (startAddr & LMEM_PCCSAR_PHYADDR_MASK) | LMEM_PCCSAR_LGO_MASK; in L1CACHE_InvalidateCodeCacheByRange()
103 startAddr += (uint32_t)L1CODEBUSCACHE_LINESIZE_BYTE; in L1CACHE_InvalidateCodeCacheByRange()
140 uint32_t startAddr = address & ~((uint32_t)L1CODEBUSCACHE_LINESIZE_BYTE - 1U); in L1CACHE_CleanCodeCacheByRange() local
146 while (startAddr < endAddr) in L1CACHE_CleanCodeCacheByRange()
149 LMEM->PCCSAR = (startAddr & LMEM_PCCSAR_PHYADDR_MASK) | LMEM_PCCSAR_LGO_MASK; in L1CACHE_CleanCodeCacheByRange()
155 startAddr += (uint32_t)L1CODEBUSCACHE_LINESIZE_BYTE; in L1CACHE_CleanCodeCacheByRange()
193 uint32_t startAddr = address & ~((uint32_t)L1CODEBUSCACHE_LINESIZE_BYTE - 1U); in L1CACHE_CleanInvalidateCodeCacheByRange() local
199 while (startAddr < endAddr) in L1CACHE_CleanInvalidateCodeCacheByRange()
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1165/drivers/cm4/
Dfsl_cache.c88 uint32_t startAddr = address & ~((uint32_t)L1CODEBUSCACHE_LINESIZE_BYTE - 1U); in L1CACHE_InvalidateCodeCacheByRange() local
94 while (startAddr < endAddr) in L1CACHE_InvalidateCodeCacheByRange()
97 LMEM->PCCSAR = (startAddr & LMEM_PCCSAR_PHYADDR_MASK) | LMEM_PCCSAR_LGO_MASK; in L1CACHE_InvalidateCodeCacheByRange()
103 startAddr += (uint32_t)L1CODEBUSCACHE_LINESIZE_BYTE; in L1CACHE_InvalidateCodeCacheByRange()
140 uint32_t startAddr = address & ~((uint32_t)L1CODEBUSCACHE_LINESIZE_BYTE - 1U); in L1CACHE_CleanCodeCacheByRange() local
146 while (startAddr < endAddr) in L1CACHE_CleanCodeCacheByRange()
149 LMEM->PCCSAR = (startAddr & LMEM_PCCSAR_PHYADDR_MASK) | LMEM_PCCSAR_LGO_MASK; in L1CACHE_CleanCodeCacheByRange()
155 startAddr += (uint32_t)L1CODEBUSCACHE_LINESIZE_BYTE; in L1CACHE_CleanCodeCacheByRange()
193 uint32_t startAddr = address & ~((uint32_t)L1CODEBUSCACHE_LINESIZE_BYTE - 1U); in L1CACHE_CleanInvalidateCodeCacheByRange() local
199 while (startAddr < endAddr) in L1CACHE_CleanInvalidateCodeCacheByRange()
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1175/drivers/cm4/
Dfsl_cache.c88 uint32_t startAddr = address & ~((uint32_t)L1CODEBUSCACHE_LINESIZE_BYTE - 1U); in L1CACHE_InvalidateCodeCacheByRange() local
94 while (startAddr < endAddr) in L1CACHE_InvalidateCodeCacheByRange()
97 LMEM->PCCSAR = (startAddr & LMEM_PCCSAR_PHYADDR_MASK) | LMEM_PCCSAR_LGO_MASK; in L1CACHE_InvalidateCodeCacheByRange()
103 startAddr += (uint32_t)L1CODEBUSCACHE_LINESIZE_BYTE; in L1CACHE_InvalidateCodeCacheByRange()
140 uint32_t startAddr = address & ~((uint32_t)L1CODEBUSCACHE_LINESIZE_BYTE - 1U); in L1CACHE_CleanCodeCacheByRange() local
146 while (startAddr < endAddr) in L1CACHE_CleanCodeCacheByRange()
149 LMEM->PCCSAR = (startAddr & LMEM_PCCSAR_PHYADDR_MASK) | LMEM_PCCSAR_LGO_MASK; in L1CACHE_CleanCodeCacheByRange()
155 startAddr += (uint32_t)L1CODEBUSCACHE_LINESIZE_BYTE; in L1CACHE_CleanCodeCacheByRange()
193 uint32_t startAddr = address & ~((uint32_t)L1CODEBUSCACHE_LINESIZE_BYTE - 1U); in L1CACHE_CleanInvalidateCodeCacheByRange() local
199 while (startAddr < endAddr) in L1CACHE_CleanInvalidateCodeCacheByRange()
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1166/drivers/cm4/
Dfsl_cache.c88 uint32_t startAddr = address & ~((uint32_t)L1CODEBUSCACHE_LINESIZE_BYTE - 1U); in L1CACHE_InvalidateCodeCacheByRange() local
94 while (startAddr < endAddr) in L1CACHE_InvalidateCodeCacheByRange()
97 LMEM->PCCSAR = (startAddr & LMEM_PCCSAR_PHYADDR_MASK) | LMEM_PCCSAR_LGO_MASK; in L1CACHE_InvalidateCodeCacheByRange()
103 startAddr += (uint32_t)L1CODEBUSCACHE_LINESIZE_BYTE; in L1CACHE_InvalidateCodeCacheByRange()
140 uint32_t startAddr = address & ~((uint32_t)L1CODEBUSCACHE_LINESIZE_BYTE - 1U); in L1CACHE_CleanCodeCacheByRange() local
146 while (startAddr < endAddr) in L1CACHE_CleanCodeCacheByRange()
149 LMEM->PCCSAR = (startAddr & LMEM_PCCSAR_PHYADDR_MASK) | LMEM_PCCSAR_LGO_MASK; in L1CACHE_CleanCodeCacheByRange()
155 startAddr += (uint32_t)L1CODEBUSCACHE_LINESIZE_BYTE; in L1CACHE_CleanCodeCacheByRange()
193 uint32_t startAddr = address & ~((uint32_t)L1CODEBUSCACHE_LINESIZE_BYTE - 1U); in L1CACHE_CleanInvalidateCodeCacheByRange() local
199 while (startAddr < endAddr) in L1CACHE_CleanInvalidateCodeCacheByRange()
[all …]
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1176/drivers/cm4/
Dfsl_cache.c88 uint32_t startAddr = address & ~((uint32_t)L1CODEBUSCACHE_LINESIZE_BYTE - 1U); in L1CACHE_InvalidateCodeCacheByRange() local
94 while (startAddr < endAddr) in L1CACHE_InvalidateCodeCacheByRange()
97 LMEM->PCCSAR = (startAddr & LMEM_PCCSAR_PHYADDR_MASK) | LMEM_PCCSAR_LGO_MASK; in L1CACHE_InvalidateCodeCacheByRange()
103 startAddr += (uint32_t)L1CODEBUSCACHE_LINESIZE_BYTE; in L1CACHE_InvalidateCodeCacheByRange()
140 uint32_t startAddr = address & ~((uint32_t)L1CODEBUSCACHE_LINESIZE_BYTE - 1U); in L1CACHE_CleanCodeCacheByRange() local
146 while (startAddr < endAddr) in L1CACHE_CleanCodeCacheByRange()
149 LMEM->PCCSAR = (startAddr & LMEM_PCCSAR_PHYADDR_MASK) | LMEM_PCCSAR_LGO_MASK; in L1CACHE_CleanCodeCacheByRange()
155 startAddr += (uint32_t)L1CODEBUSCACHE_LINESIZE_BYTE; in L1CACHE_CleanCodeCacheByRange()
193 uint32_t startAddr = address & ~((uint32_t)L1CODEBUSCACHE_LINESIZE_BYTE - 1U); in L1CACHE_CleanInvalidateCodeCacheByRange() local
199 while (startAddr < endAddr) in L1CACHE_CleanInvalidateCodeCacheByRange()
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/hal_nxp-3.6.0/mcux/mcux-sdk/drivers/iee_apc/
Dfsl_iee_apc.c65 status_t IEE_APC_SetRegionConfig(IEE_APC_Type *base, iee_apc_region_t region, uint32_t startAddr, u… in IEE_APC_SetRegionConfig() argument
74 if ((startAddr & (~IOMUXC_LPSR_GPR_GPR3_APC_AC_R0_TOP_MASK)) != 0U || in IEE_APC_SetRegionConfig()
82 IOMUXC_LPSR_GPR->GPR2 |= startAddr & IOMUXC_LPSR_GPR_APC_ADDR_MASK; in IEE_APC_SetRegionConfig()
84 IEE_APC->REGION0_BOT_ADDR = startAddr >> 3; in IEE_APC_SetRegionConfig()
89 IOMUXC_LPSR_GPR->GPR4 |= startAddr & IOMUXC_LPSR_GPR_APC_ADDR_MASK; in IEE_APC_SetRegionConfig()
91 IEE_APC->REGION1_BOT_ADDR = startAddr >> 3; in IEE_APC_SetRegionConfig()
96 IOMUXC_LPSR_GPR->GPR6 |= startAddr & IOMUXC_LPSR_GPR_APC_ADDR_MASK; in IEE_APC_SetRegionConfig()
98 IEE_APC->REGION2_BOT_ADDR = startAddr >> 3; in IEE_APC_SetRegionConfig()
103 IOMUXC_LPSR_GPR->GPR8 |= startAddr & IOMUXC_LPSR_GPR_APC_ADDR_MASK; in IEE_APC_SetRegionConfig()
105 IEE_APC->REGION3_BOT_ADDR = startAddr >> 3; in IEE_APC_SetRegionConfig()
[all …]
Dfsl_iee_apc.h92 status_t IEE_APC_SetRegionConfig(IEE_APC_Type *base, iee_apc_region_t region, uint32_t startAddr, u…
/hal_nxp-3.6.0/mcux/mcux-sdk/drivers/cache/cache64/
Dfsl_cache.c219 uint32_t startAddr = address & ~((uint32_t)CACHE64_LINESIZE_BYTE - 1U); in CACHE64_InvalidateCacheByRange() local
236 while (startAddr < endAddr) in CACHE64_InvalidateCacheByRange()
239 base->CSAR = (startAddr & CACHE64_CTRL_CSAR_PHYADDR_MASK) | CACHE64_CTRL_CSAR_LGO_MASK; in CACHE64_InvalidateCacheByRange()
245 startAddr += (uint32_t)CACHE64_LINESIZE_BYTE; in CACHE64_InvalidateCacheByRange()
282 uint32_t startAddr = address & ~((uint32_t)CACHE64_LINESIZE_BYTE - 1U); in CACHE64_CleanCacheByRange() local
299 while (startAddr < endAddr) in CACHE64_CleanCacheByRange()
302 base->CSAR = (startAddr & CACHE64_CTRL_CSAR_PHYADDR_MASK) | CACHE64_CTRL_CSAR_LGO_MASK; in CACHE64_CleanCacheByRange()
308 startAddr += (uint32_t)CACHE64_LINESIZE_BYTE; in CACHE64_CleanCacheByRange()
347 uint32_t startAddr = address & ~((uint32_t)CACHE64_LINESIZE_BYTE - 1U); in CACHE64_CleanInvalidateCacheByRange() local
364 while (startAddr < endAddr) in CACHE64_CleanInvalidateCacheByRange()
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/hal_nxp-3.6.0/mcux/mcux-sdk/drivers/otfad/
Dfsl_otfad.c142 uint32_t startAddr = config->startAddr; in OTFAD_SetEncryptionConfig() local
155 if (startAddr <= endAddr) in OTFAD_SetEncryptionConfig()
158 startAddr = (startAddr & OTFAD_RGD_W0_SRTADDR_MASK) >> OTFAD_RGD_W0_SRTADDR_SHIFT; in OTFAD_SetEncryptionConfig()
165 base->CTX[contextIndex].RGD_W0 = OTFAD_RGD_W0_SRTADDR(startAddr); in OTFAD_SetEncryptionConfig()
213 config->startAddr = in OTFAD_GetEncryptionConfig()
235 uint32_t startAddr; in OTFAD_HitDetermination() local
244 … startAddr = (base->CTX[index].RGD_W0 & OTFAD_RGD_W0_SRTADDR_MASK) >> OTFAD_RGD_W0_SRTADDR_SHIFT; in OTFAD_HitDetermination()
250 if ((tempAddr >= startAddr) && (tempAddr <= endAddr) && contextValid) in OTFAD_HitDetermination()
Dfsl_otfad.h66 uint32_t startAddr; /*!< Start address*/ member
/hal_nxp-3.6.0/imx/drivers/
Drdc.c43 void RDC_SetMrAccess(RDC_Type * base, uint32_t mr, uint32_t startAddr, uint32_t endAddr, in RDC_SetMrAccess() argument
46 base->MR[mr].MRSA = startAddr; in RDC_SetMrAccess()
57 uint8_t RDC_GetMrAccess(RDC_Type * base, uint32_t mr, uint32_t *startAddr, uint32_t *endAddr) in RDC_GetMrAccess() argument
59 if (startAddr) in RDC_GetMrAccess()
60 *startAddr = base->MR[mr].MRSA; in RDC_GetMrAccess()
Drdc.h206 void RDC_SetMrAccess(RDC_Type * base, uint32_t mr, uint32_t startAddr, uint32_t endAddr,
218 uint8_t RDC_GetMrAccess(RDC_Type * base, uint32_t mr, uint32_t *startAddr, uint32_t *endAddr);
/hal_nxp-3.6.0/mcux/mcux-sdk/drivers/pdm/
Dfsl_pdm_sdma.c160 uint32_t startAddr = in PDM_TransferReceiveSDMA() local
181 …SDMA_PrepareTransfer(&config, startAddr, (uint32_t)xfer->data, handle->fifoWidth, handle->fifoWidt… in PDM_TransferReceiveSDMA()
193 … SDMA_ConfigBufferDescriptor(&handle->bdPool[handle->queueUser], startAddr, (uint32_t)xfer->data, in PDM_TransferReceiveSDMA()
199 … SDMA_ConfigBufferDescriptor(&handle->bdPool[handle->queueUser], startAddr, (uint32_t)xfer->data, in PDM_TransferReceiveSDMA()
Dfsl_pdm_edma.c283 …uint32_t startAddr = PDM_GetDataRegisterAddress(base, handle->endChannel - (handle->cha… in PDM_TransferReceiveEDMA() local
303 if (((startAddr & 0xFU) != 0U) || (mappedChannel > 4U)) in PDM_TransferReceiveEDMA()
336 … EDMA_PrepareTransferConfig(&config, (void *)(uint32_t *)startAddr, FSL_FEATURE_PDM_FIFO_WIDTH, 0, in PDM_TransferReceiveEDMA()
343 … EDMA_PrepareTransferConfig(&config, (void *)(uint32_t *)startAddr, FSL_FEATURE_PDM_FIFO_WIDTH, in PDM_TransferReceiveEDMA()
/hal_nxp-3.6.0/mcux/mcux-sdk/drivers/flexio/mculcd/
Dfsl_flexio_mculcd_smartdma.c57 …uint32_t totalLen, uint32_t startAddr, uint32_t *part1Len, uint32_t *part2Len, uint32_t *part3Len);
81 … uint32_t totalLen, uint32_t startAddr, uint32_t *part1Len, uint32_t *part2Len, uint32_t *part3Len) in FLEXIO_MCULCD_SMARTDMA_GetTxChunkLen() argument
91 *part3Len = (startAddr + totalLen) & (FLEXIO_MCULCD_SMARTDMA_TX_ADDR_ALIGN - 1U); in FLEXIO_MCULCD_SMARTDMA_GetTxChunkLen()
/hal_nxp-3.6.0/mcux/mcux-sdk/drivers/sysmpu/
Dfsl_sysmpu.c176 void SYSMPU_SetRegionAddr(SYSMPU_Type *base, uint32_t regionNum, uint32_t startAddr, uint32_t endAd… in SYSMPU_SetRegionAddr() argument
180 base->WORD[regionNum][0] = startAddr; in SYSMPU_SetRegionAddr()
Dfsl_sysmpu.h341 void SYSMPU_SetRegionAddr(SYSMPU_Type *base, uint32_t regionNum, uint32_t startAddr, uint32_t endAd…
/hal_nxp-3.6.0/mcux/mcux-sdk/drivers/xrdc2/
Dfsl_xrdc2.c420 config->startAddr = 0U; in XRDC2_GetMemAccessDefaultConfig()
440 assert((config->startAddr & XRDC2_MRGD_ADDR_ALIGN_MASK) == 0U); in XRDC2_SetMemAccessConfig()
454 base->MRCI_MRGDJ[mrc][mrgd].MRC_MRGD_W0 = config->startAddr; in XRDC2_SetMemAccessConfig()
Dfsl_xrdc2.h126 uint32_t startAddr; /*!< Memory region start address, should be 4k aligned. */ member
/hal_nxp-3.6.0/s32/drivers/s32k3/Fls/src/
DQspi_Ip_Hyperflash.c819 uint32 startAddr; in Qspi_Ip_HyperflashSectorBlankCheck() local
822 startAddr = (uint32)(sectorAddress & ~(QSPI_IP_HYPERFLASH_SECTOR_SIZE - 1U)); in Qspi_Ip_HyperflashSectorBlankCheck()
825 status = Qspi_Ip_RunCommand(instance, QSPI_IP_HF_LUT_BC, (startAddr + (uint32)0xAAA)); in Qspi_Ip_HyperflashSectorBlankCheck()
/hal_nxp-3.6.0/mcux/mcux-sdk/components/i3c_bus/
Dfsl_component_i3c.h360 uint8_t I3C_BusGetValidAddrSlot(i3c_bus_t *bus, uint8_t startAddr);
Dfsl_component_i3c.c360 uint8_t I3C_BusGetValidAddrSlot(i3c_bus_t *bus, uint8_t startAddr) in I3C_BusGetValidAddrSlot() argument
364 for (validAddr = startAddr; validAddr < I3C_BUS_MAX_ADDR; validAddr++) in I3C_BusGetValidAddrSlot()