/hal_nxp-3.6.0/mcux/mcux-sdk/components/power_manager/devices/MIMXRT533S/ |
D | fsl_pm_device.c | 78 .rescMask[0U] = 0x00000000UL, 79 .rescMask[1U] = 0x00000000UL, 80 .rescMask[2U] = 0x0UL, 84 .rescMask[0U] = 0xFFFFFFFFUL, 85 .rescMask[1U] = 0xFFFFFFFFUL, 86 .rescMask[2U] = 0x3UL, 93 .rescMask[0U] = 0x00000000UL, 94 .rescMask[1U] = 0x00000000UL, 95 .rescMask[2U] = 0x0UL, 99 .rescMask[0U] = 0xFFFFFFFFUL, [all …]
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D | fsl_pm_device.h | 39 #define PM_RESC_MASK(resc_masks, resc) (resc_masks->rescMask[resc / 32L] >> (resc % 32L)) & 1U
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/hal_nxp-3.6.0/mcux/mcux-sdk/components/power_manager/devices/MIMXRT555S/ |
D | fsl_pm_device.c | 78 .rescMask[0U] = 0x00000000UL, 79 .rescMask[1U] = 0x00000000UL, 80 .rescMask[2U] = 0x0UL, 84 .rescMask[0U] = 0xFFFFFFFFUL, 85 .rescMask[1U] = 0xFFFFFFFFUL, 86 .rescMask[2U] = 0x3UL, 93 .rescMask[0U] = 0x00000000UL, 94 .rescMask[1U] = 0x00000000UL, 95 .rescMask[2U] = 0x0UL, 99 .rescMask[0U] = 0xFFFFFFFFUL, [all …]
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D | fsl_pm_device.h | 39 #define PM_RESC_MASK(resc_masks, resc) (resc_masks->rescMask[resc / 32L] >> (resc % 32L)) & 1U
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/hal_nxp-3.6.0/mcux/mcux-sdk/components/power_manager/devices/MIMXRT595S/ |
D | fsl_pm_device.c | 78 .rescMask[0U] = 0x00000000UL, 79 .rescMask[1U] = 0x00000000UL, 80 .rescMask[2U] = 0x0UL, 84 .rescMask[0U] = 0xFFFFFFFFUL, 85 .rescMask[1U] = 0xFFFFFFFFUL, 86 .rescMask[2U] = 0x3UL, 93 .rescMask[0U] = 0x00000000UL, 94 .rescMask[1U] = 0x00000000UL, 95 .rescMask[2U] = 0x0UL, 99 .rescMask[0U] = 0xFFFFFFFFUL, [all …]
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D | fsl_pm_device.h | 39 #define PM_RESC_MASK(resc_masks, resc) (resc_masks->rescMask[resc / 32L] >> (resc % 32L)) & 1U
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/hal_nxp-3.6.0/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1172/ |
D | fsl_pm_device.c | 378 .rescMask[0] = 0x3C0000CUL, 379 .rescMask[1] = 0x1D8UL, 388 .rescMask[0] = 0x1UL, 389 .rescMask[1] = 0x200UL, 402 .rescMask[0] = 0xCUL, 403 .rescMask[1] = 0x198UL, 412 .rescMask[0] = 0x1UL, 413 .rescMask[1] = 0x200UL, 425 .rescMask[0] = 0xCUL, 426 .rescMask[1] = 0x188UL, [all …]
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/hal_nxp-3.6.0/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1173/ |
D | fsl_pm_device.c | 378 .rescMask[0] = 0x3C0000CUL, 379 .rescMask[1] = 0x1D8UL, 388 .rescMask[0] = 0x1UL, 389 .rescMask[1] = 0x200UL, 402 .rescMask[0] = 0xCUL, 403 .rescMask[1] = 0x198UL, 412 .rescMask[0] = 0x1UL, 413 .rescMask[1] = 0x200UL, 425 .rescMask[0] = 0xCUL, 426 .rescMask[1] = 0x188UL, [all …]
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/hal_nxp-3.6.0/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1175/ |
D | fsl_pm_device.c | 378 .rescMask[0] = 0x3C0000CUL, 379 .rescMask[1] = 0x1D8UL, 388 .rescMask[0] = 0x1UL, 389 .rescMask[1] = 0x200UL, 402 .rescMask[0] = 0xCUL, 403 .rescMask[1] = 0x198UL, 412 .rescMask[0] = 0x1UL, 413 .rescMask[1] = 0x200UL, 425 .rescMask[0] = 0xCUL, 426 .rescMask[1] = 0x188UL, [all …]
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/hal_nxp-3.6.0/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1176/ |
D | fsl_pm_device.c | 378 .rescMask[0] = 0x3C0000CUL, 379 .rescMask[1] = 0x1D8UL, 388 .rescMask[0] = 0x1UL, 389 .rescMask[1] = 0x200UL, 402 .rescMask[0] = 0xCUL, 403 .rescMask[1] = 0x198UL, 412 .rescMask[0] = 0x1UL, 413 .rescMask[1] = 0x200UL, 425 .rescMask[0] = 0xCUL, 426 .rescMask[1] = 0x188UL, [all …]
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/hal_nxp-3.6.0/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1171/ |
D | fsl_pm_device.c | 378 .rescMask[0] = 0x3C0000CUL, 379 .rescMask[1] = 0x1D8UL, 388 .rescMask[0] = 0x1UL, 389 .rescMask[1] = 0x200UL, 402 .rescMask[0] = 0xCUL, 403 .rescMask[1] = 0x198UL, 412 .rescMask[0] = 0x1UL, 413 .rescMask[1] = 0x200UL, 425 .rescMask[0] = 0xCUL, 426 .rescMask[1] = 0x188UL, [all …]
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/hal_nxp-3.6.0/mcux/mcux-sdk/components/power_manager/devices/MIMXRT685S/ |
D | fsl_pm_device.c | 72 .rescMask[0U] = 0x00000000UL, 73 .rescMask[1U] = 0x0000000UL, 77 .rescMask[0U] = 0xFFFFFFFEUL, 78 .rescMask[1U] = 0x3FFFFFFUL, 85 .rescMask[0U] = 0x00000000UL, 86 .rescMask[1U] = 0x0000000UL, 90 .rescMask[0U] = 0xFFFFFFFFUL, 91 .rescMask[1U] = 0x3FFFFFFUL, 98 .rescMask[0U] = 0xFFFFFFFFUL, 99 .rescMask[1U] = 0x3FFFFFFUL, [all …]
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D | fsl_pm_device.h | 36 #define PM_RESC_MASK(resc_masks, resc) (resc_masks->rescMask[resc / 32L] >> (resc % 32L)) & 1U
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/hal_nxp-3.6.0/mcux/mcux-sdk/components/power_manager/core/ |
D | fsl_pm_core.c | 89 … if ((s_pmHandle->resConstraintMask.rescMask[j] & state->fixConstraintsMask.rescMask[j]) == 0UL) in PM_findDeepestState() 91 tmpSoftRescMask.rescMask[j] = in PM_findDeepestState() 92 … state->varConstraintsMask.rescMask[j] & (s_pmHandle->resConstraintMask.rescMask[j]); in PM_findDeepestState() 816 … s_pmHandle->resConstraintMask.rescMask[rescShift / 32UL] |= (1UL << ((uint32_t)rescShift % 32UL)); in PM_SetConstraints() 899 …s_pmHandle->resConstraintMask.rescMask[rescShift / 32UL] &= ~(1UL << ((uint32_t)rescShift % 32UL)); in PM_ReleaseConstraints()
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D | fsl_pm_core.h | 216 uint32_t rescMask[PM_RESC_MASK_ARRAY_SIZE]; /*!< The resource constraint mask. */ member
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/hal_nxp-3.6.0/mcux/mcux-sdk/components/power_manager/ |
D | README.md | 210      `.rescMask[0U] = 0x00000000UL,` 211      `.rescMask[1U] = 0x00000000UL,` 212      `.rescMask[2U] = 0x0UL,` 216      `.rescMask[0U] = 0xFFFFFFFFUL,` 217      `.rescMask[1U] = 0xFFFFFFFFUL,` 218      `.rescMask[2U] = 0x3UL,`
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