| /hal_nxp-3.6.0/mcux/mcux-sdk/drivers/elcdif/ |
| D | fsl_elcdif.c | 138 ((uint32_t)config->hsw << LCDIF_VDCTRL2_HSYNC_PULSE_WIDTH_SHIFT) | in ELCDIF_RgbModeInit()
139 …int32_t)config->hfp + (uint32_t)config->hbp + (uint32_t)config->panelWidth + (uint32_t)config->hsw) in ELCDIF_RgbModeInit()
142 …base->VDCTRL3 = (((uint32_t)config->hbp + config->hsw) << LCDIF_VDCTRL3_HORIZONTAL_WAIT_CNT_SHIFT)… in ELCDIF_RgbModeInit()
186 config->hsw = 41; in ELCDIF_RgbModeGetDefaultConfig()
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| D | fsl_elcdif.h | 196 uint8_t hsw; /*!< HSYNC pulse width. */ member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/components/video/display/adv7535/ |
| D | fsl_adv7535.c | 186 …otal_width = FSL_VIDEO_EXTRACT_WIDTH(config->resolution) + config->hfp + config->hbp + config->hsw; in ADV7535_Init()
191 …_CHECK_RET(ADV7535_I2C_WriteReg(handle, ADV7535_DSI_CEC_ADDR, 0x2A, (uint8_t)(config->hsw >> 4U))); in ADV7535_Init()
192 …_CHECK_RET(ADV7535_I2C_WriteReg(handle, ADV7535_DSI_CEC_ADDR, 0x2B, (uint8_t)(config->hsw << 4U))); in ADV7535_Init()
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| /hal_nxp-3.6.0/mcux/mcux-sdk/drivers/lcdif/ |
| D | fsl_lcdif.c | 131 config->hsw = 0; in LCDIF_DpiModeGetDefaultConfig()
172 …(((uint32_t)config->panelWidth + config->hsw + config->hfp + config->hbp) << LCDIF_HDISPLAY0_TOTAL… in LCDIF_DpiModeSetConfig()
180 … (((uint32_t)config->panelWidth + config->hfp + config->hsw) << LCDIF_HSYNC0_END_SHIFT) | in LCDIF_DpiModeSetConfig()
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| D | fsl_lcdif.h | 90 uint8_t hsw; /*!< HSYNC pulse width. */ member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/components/video/display/ |
| D | fsl_display.h | 23 uint16_t hsw; /*!< HSYNC pulse width. */ member
49 uint16_t hsw; /*!< HSYNC pulse width. */ member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/components/ssd1963/ |
| D | fsl_ssd1963.c | 249 ht = config->panelWidth + config->hsw + config->hfp + config->hbp; in SSD1963_Init()
250 hps = config->hsw + config->hbp; in SSD1963_Init()
255 commandParam[4] = (uint8_t)(config->hsw - 1U); in SSD1963_Init()
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| D | fsl_ssd1963.h | 190 uint16_t hsw; /*!< HSYNC pulse width. */ member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/components/video/display/dc/elcdif/ |
| D | fsl_dc_fb_elcdif.c | 83 elcdifConfig.hsw = (uint8_t)dcConfig->hsw; in DC_FB_ELCDIF_Init()
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| D | fsl_dc_fb_elcdif.h | 64 uint16_t hsw; /*!< HSYNC pulse width. */ member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/components/video/display/dc/lcdif/ |
| D | fsl_dc_fb_lcdif.c | 83 lcdifConfig.hsw = (uint8_t)dcConfig->hsw; in DC_FB_LCDIF_Init()
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| D | fsl_dc_fb_lcdif.h | 66 uint16_t hsw; /*!< HSYNC pulse width. */ member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/components/video/display/dc/lcdifv2/ |
| D | fsl_dc_fb_lcdifv2.c | 88 lcdifv2Config.hsw = (uint8_t)dcConfig->hsw; in DC_FB_LCDIFV2_Init()
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| D | fsl_dc_fb_lcdifv2.h | 71 uint16_t hsw; /*!< HSYNC pulse width. */ member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/drivers/lcdifv2/ |
| D | fsl_lcdifv2.c | 169 config->hsw = 3U; in LCDIFV2_DisplayGetDefaultConfig()
195 base->HSYN_PARA = ((uint32_t)config->hsw << LCDIFV2_HSYN_PARA_PW_H_SHIFT) | in LCDIFV2_SetDisplayConfig()
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| D | fsl_lcdifv2.h | 129 uint8_t hsw; /*!< HSYNC pulse width. */ member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/drivers/lpc_lcdc/ |
| D | fsl_lcdc.c | 234 …IMH = LCD_TIMH_PPL(((uint32_t)config->ppl / 16U) - 1U) | LCD_TIMH_HSW((uint32_t)config->hsw - 1U) | in LCDC_Init()
307 config->hsw = 0U; in LCDC_GetDefaultConfig()
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| D | fsl_lcdc.h | 105 uint8_t hsw; /*!< HSYNC pulse width. */ member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/drivers/mipi_dsi/ |
| D | fsl_mipi_dsi.h | 119 uint16_t hsw; /*!< Horizontal sync width, in dpi pixel clock. */ member
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| D | fsl_mipi_dsi.c | 576 base->CFG_DPI_HSA = config->hsw * coff - DSI_HSA_OVERHEAD_BYTE; in DSI_SetDpiConfig()
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| /hal_nxp-3.6.0/mcux/mcux-sdk/drivers/mipi_dsi_split/ |
| D | fsl_mipi_dsi.h | 124 uint16_t hsw; /*!< Horizontal sync width, in dpi pixel clock. */ member
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| D | fsl_mipi_dsi.c | 595 dpi->HSA = config->hsw * coff - DSI_HSA_OVERHEAD_BYTE; in DSI_SetDpiConfig()
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| /hal_nxp-3.6.0/mcux/mcux-sdk/drivers/dpu/ |
| D | fsl_dpu.c | 3104 config->hsw = 32U; in DPU_DisplayTimingGetDefaultConfig()
3140 …U_FRAMEGEN_HTCFG1_Htotal((uint32_t)config->width + config->hfp + config->hbp + config->hsw - 1UL) | in DPU_InitDisplayTiming()
3143 display->FRAMEGEN.HTCFG2 = DPU_FRAMEGEN_HTCFG2_Hsync(config->hsw - 1UL) | in DPU_InitDisplayTiming()
3144 DPU_FRAMEGEN_HTCFG2_Hsbp((uint32_t)config->hbp + config->hsw - 1UL) | in DPU_InitDisplayTiming()
3168 …[0].SPGPOSOFF = DPU_TCON_SPGPOSOFF_SPGPSOFF_X((uint32_t)config->width + config->hfp + config->hsw); in DPU_InitDisplayTiming()
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| D | fsl_dpu.h | 706 uint16_t hsw; /*!< HSYNC pulse width. */ member
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