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Searched refs:frdiv (Results 1 – 25 of 120) sorted by relevance

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/hal_nxp-3.6.0/mcux/mcux-sdk/boards/twrkv58f220m/
Dclock_config.c92 static void CLOCK_CONFIG_SetFllExtRefDiv(uint8_t frdiv) in CLOCK_CONFIG_SetFllExtRefDiv() argument
94 MCG->C1 = ((MCG->C1 & ~MCG_C1_FRDIV_MASK) | MCG_C1_FRDIV(frdiv)); in CLOCK_CONFIG_SetFllExtRefDiv()
149 .frdiv = 0x0U, /* FLL reference clock divider: divided by 32 */
185 CLOCK_CONFIG_SetFllExtRefDiv(mcgConfig_BOARD_BootClockRUN.frdiv); in BOARD_BootClockRUN()
242 .frdiv = 0x0U, /* FLL reference clock divider: divided by 32 */
343 .frdiv = 0x0U, /* FLL reference clock divider: divided by 32 */
389 CLOCK_CONFIG_SetFllExtRefDiv(mcgConfig_BOARD_BootClockHSRUN.frdiv); in BOARD_BootClockHSRUN()
/hal_nxp-3.6.0/mcux/mcux-sdk/boards/frdmk22f/
Dclock_config.c82 static void CLOCK_CONFIG_SetFllExtRefDiv(uint8_t frdiv) in CLOCK_CONFIG_SetFllExtRefDiv() argument
84 MCG->C1 = ((MCG->C1 & ~MCG_C1_FRDIV_MASK) | MCG_C1_FRDIV(frdiv)); in CLOCK_CONFIG_SetFllExtRefDiv()
151 .frdiv = 0x0U, /* FLL reference clock divider: divided by 32 */
195 CLOCK_CONFIG_SetFllExtRefDiv(mcgConfig_BOARD_BootClockRUN.frdiv); in BOARD_BootClockRUN()
253 .frdiv = 0x0U, /* FLL reference clock divider: divided by 32 */
369 .frdiv = 0x0U, /* FLL reference clock divider: divided by 32 */
419 CLOCK_CONFIG_SetFllExtRefDiv(mcgConfig_BOARD_BootClockHSRUN.frdiv); in BOARD_BootClockHSRUN()
/hal_nxp-3.6.0/mcux/mcux-sdk/boards/frdmkv31f/
Dclock_config.c82 static void CLOCK_CONFIG_SetFllExtRefDiv(uint8_t frdiv) in CLOCK_CONFIG_SetFllExtRefDiv() argument
84 MCG->C1 = ((MCG->C1 & ~MCG_C1_FRDIV_MASK) | MCG_C1_FRDIV(frdiv)); in CLOCK_CONFIG_SetFllExtRefDiv()
150 .frdiv = 0x0U, /* FLL reference clock divider: divided by 32 */
200 CLOCK_CONFIG_SetFllExtRefDiv(mcgConfig_BOARD_BootClockHSRUN.frdiv); in BOARD_BootClockHSRUN()
256 .frdiv = 0x0U, /* FLL reference clock divider: divided by 32 */
367 .frdiv = 0x0U, /* FLL reference clock divider: divided by 32 */
411 CLOCK_CONFIG_SetFllExtRefDiv(mcgConfig_BOARD_BootClockRUN.frdiv); in BOARD_BootClockRUN()
/hal_nxp-3.6.0/mcux/mcux-sdk/middleware/issdk/boardkit/frdm-k22f/
Dclock_config.c75 static void CLOCK_CONFIG_SetFllExtRefDiv(uint8_t frdiv) in CLOCK_CONFIG_SetFllExtRefDiv() argument
77 MCG->C1 = ((MCG->C1 & ~MCG_C1_FRDIV_MASK) | MCG_C1_FRDIV(frdiv)); in CLOCK_CONFIG_SetFllExtRefDiv()
133 .frdiv = 0x0U, /* FLL reference clock divider: divided by 32 */
177 CLOCK_CONFIG_SetFllExtRefDiv(mcgConfig_BOARD_BootClockRUN.frdiv); in BOARD_BootClockRUN()
233 .frdiv = 0x0U, /* FLL reference clock divider: divided by 32 */
347 .frdiv = 0x0U, /* FLL reference clock divider: divided by 32 */
397 CLOCK_CONFIG_SetFllExtRefDiv(mcgConfig_BOARD_BootClockHSRUN.frdiv); in BOARD_BootClockHSRUN()
/hal_nxp-3.6.0/mcux/mcux-sdk/boards/frdmk28fa/
Dclock_config.c80 static void CLOCK_CONFIG_SetFllExtRefDiv(uint8_t frdiv) in CLOCK_CONFIG_SetFllExtRefDiv() argument
82 MCG->C1 = ((MCG->C1 & ~MCG_C1_FRDIV_MASK) | MCG_C1_FRDIV(frdiv)); in CLOCK_CONFIG_SetFllExtRefDiv()
148 .frdiv = 0x0U, /* FLL reference clock divider: divided by 32 */
191 CLOCK_CONFIG_SetFllExtRefDiv(mcgConfig_BOARD_BootClockRUN.frdiv); in BOARD_BootClockRUN()
239 .frdiv = 0x0U, /* FLL reference clock divider: divided by 1 */
347 .frdiv = 0x0U, /* FLL reference clock divider: divided by 32 */
396 CLOCK_CONFIG_SetFllExtRefDiv(mcgConfig_BOARD_BootClockHSRUN.frdiv); in BOARD_BootClockHSRUN()
/hal_nxp-3.6.0/mcux/mcux-sdk/boards/frdmk66f/
Dclock_config.c82 static void CLOCK_CONFIG_SetFllExtRefDiv(uint8_t frdiv) in CLOCK_CONFIG_SetFllExtRefDiv() argument
84 MCG->C1 = ((MCG->C1 & ~MCG_C1_FRDIV_MASK) | MCG_C1_FRDIV(frdiv)); in CLOCK_CONFIG_SetFllExtRefDiv()
159 .frdiv = 0x0U, /* FLL reference clock divider: divided by 32 */
212 CLOCK_CONFIG_SetFllExtRefDiv(mcgConfig_BOARD_BootClockHSRUN.frdiv); in BOARD_BootClockHSRUN()
268 .frdiv = 0x0U, /* FLL reference clock divider: divided by 32 */
386 .frdiv = 0x0U, /* FLL reference clock divider: divided by 32 */
433 CLOCK_CONFIG_SetFllExtRefDiv(mcgConfig_BOARD_BootClockRUN.frdiv); in BOARD_BootClockRUN()
/hal_nxp-3.6.0/mcux/mcux-sdk/boards/frdmk22f/project_template/
Dclock_config.c130 static void CLOCK_CONFIG_SetFllExtRefDiv(uint8_t frdiv) in CLOCK_CONFIG_SetFllExtRefDiv() argument
132 MCG->C1 = ((MCG->C1 & ~MCG_C1_FRDIV_MASK) | MCG_C1_FRDIV(frdiv)); in CLOCK_CONFIG_SetFllExtRefDiv()
207 .frdiv = 0x0U, /* FLL reference clock divider: divided by 32 */
249 CLOCK_CONFIG_SetFllExtRefDiv(mcgConfig_BOARD_BootClockRUN.frdiv); in BOARD_BootClockRUN()
313 .frdiv = 0x0U, /* FLL reference clock divider: divided by 32 */
430 .frdiv = 0x0U, /* FLL reference clock divider: divided by 32 */
477 CLOCK_CONFIG_SetFllExtRefDiv(mcgConfig_BOARD_BootClockHSRUN.frdiv); in BOARD_BootClockHSRUN()
/hal_nxp-3.6.0/mcux/mcux-sdk/middleware/issdk/boardkit/frdm-k64f/
Dclock_config.c76 static void CLOCK_CONFIG_SetFllExtRefDiv(uint8_t frdiv) in CLOCK_CONFIG_SetFllExtRefDiv() argument
78 MCG->C1 = ((MCG->C1 & ~MCG_C1_FRDIV_MASK) | MCG_C1_FRDIV(frdiv)); in CLOCK_CONFIG_SetFllExtRefDiv()
137 .frdiv = 0x0U, /* FLL reference clock divider: divided by 32 */
180 CLOCK_CONFIG_SetFllExtRefDiv(mcgConfig_BOARD_BootClockRUN.frdiv); in BOARD_BootClockRUN()
235 .frdiv = 0x0U, /* FLL reference clock divider: divided by 32 */
/hal_nxp-3.6.0/mcux/mcux-sdk/middleware/issdk/boardkit/frdm-kl25z/
Dclock_config.c76 static void CLOCK_CONFIG_SetFllExtRefDiv(uint8_t frdiv) in CLOCK_CONFIG_SetFllExtRefDiv() argument
78 MCG->C1 = ((MCG->C1 & ~MCG_C1_FRDIV_MASK) | MCG_C1_FRDIV(frdiv)); in CLOCK_CONFIG_SetFllExtRefDiv()
131 .frdiv = 0x0U, /* FLL reference clock divider: divided by 32 */
169 CLOCK_CONFIG_SetFllExtRefDiv(mcgConfig_BOARD_BootClockRUN.frdiv); in BOARD_BootClockRUN()
224 .frdiv = 0x0U, /* FLL reference clock divider: divided by 32 */
/hal_nxp-3.6.0/mcux/mcux-sdk/boards/twrkm34z75m/
Dclock_config.c168 .frdiv = 0x0U, /* FLL reference clock divider: divided by 1 */
176 .frdiv = 0x0U, /* FLL reference clock divider: divided by 1 */
212 mcgConfig_BOARD_BootClockRUN.frdiv, in BOARD_BootClockRUN()
264 .frdiv = 0x0U, /* FLL reference clock divider: divided by 32 */
272 .frdiv = 0x0U, /* FLL reference clock divider: divided by 32 */
/hal_nxp-3.6.0/mcux/mcux-sdk/boards/twrkm35z75m/project_template/
Dclock_config.c171 .frdiv = 0x0U, /* FLL reference clock divider: divided by 1 */
179 .frdiv = 0x0U, /* FLL reference clock divider: divided by 1 */
211 CLOCK_BootToFeeMode(mcgConfig_BOARD_BootClockRUN.oscsel, mcgConfig_BOARD_BootClockRUN.frdiv, in BOARD_BootClockRUN()
261 .frdiv = 0x0U, /* FLL reference clock divider: divided by 32 */
269 .frdiv = 0x0U, /* FLL reference clock divider: divided by 32 */
/hal_nxp-3.6.0/mcux/mcux-sdk/boards/frdmk64f/
Dclock_config.c82 static void CLOCK_CONFIG_SetFllExtRefDiv(uint8_t frdiv) in CLOCK_CONFIG_SetFllExtRefDiv() argument
84 MCG->C1 = ((MCG->C1 & ~MCG_C1_FRDIV_MASK) | MCG_C1_FRDIV(frdiv)); in CLOCK_CONFIG_SetFllExtRefDiv()
154 .frdiv = 0x0U, /* FLL reference clock divider: divided by 32 */
197 CLOCK_CONFIG_SetFllExtRefDiv(mcgConfig_BOARD_BootClockRUN.frdiv); in BOARD_BootClockRUN()
254 .frdiv = 0x0U, /* FLL reference clock divider: divided by 32 */
/hal_nxp-3.6.0/mcux/mcux-sdk/boards/twrkm35z75m/
Dclock_config.c174 .frdiv = 0x0U, /* FLL reference clock divider: divided by 1 */
182 .frdiv = 0x0U, /* FLL reference clock divider: divided by 1 */
218 mcgConfig_BOARD_BootClockRUN.frdiv, in BOARD_BootClockRUN()
270 .frdiv = 0x0U, /* FLL reference clock divider: divided by 32 */
278 .frdiv = 0x0U, /* FLL reference clock divider: divided by 32 */
/hal_nxp-3.6.0/mcux/mcux-sdk/boards/frdmkv31f/project_template/
Dclock_config.c84 static void CLOCK_CONFIG_SetFllExtRefDiv(uint8_t frdiv) in CLOCK_CONFIG_SetFllExtRefDiv() argument
86 MCG->C1 = ((MCG->C1 & ~MCG_C1_FRDIV_MASK) | MCG_C1_FRDIV(frdiv)); in CLOCK_CONFIG_SetFllExtRefDiv()
162 .frdiv = 0x0U, /* FLL reference clock divider: divided by 32 */
208 CLOCK_CONFIG_SetFllExtRefDiv(mcgConfig_BOARD_BootClockHSRUN.frdiv); in BOARD_BootClockHSRUN()
266 .frdiv = 0x0U, /* FLL reference clock divider: divided by 32 */
/hal_nxp-3.6.0/mcux/mcux-sdk/boards/frdmk64f/project_template/
Dclock_config.c88 static void CLOCK_CONFIG_SetFllExtRefDiv(uint8_t frdiv) in CLOCK_CONFIG_SetFllExtRefDiv() argument
90 MCG->C1 = ((MCG->C1 & ~MCG_C1_FRDIV_MASK) | MCG_C1_FRDIV(frdiv)); in CLOCK_CONFIG_SetFllExtRefDiv()
171 .frdiv = 0x0U, /* FLL reference clock divider: divided by 32 */
210 CLOCK_CONFIG_SetFllExtRefDiv(mcgConfig_BOARD_BootClockRUN.frdiv); in BOARD_BootClockRUN()
275 .frdiv = 0x0U, /* FLL reference clock divider: divided by 32 */
/hal_nxp-3.6.0/mcux/mcux-sdk/boards/twrkm34z75m/project_template/
Dclock_config.c202 .frdiv = 0x0U, /* FLL reference clock divider: divided by 1 */
210 .frdiv = 0x0U, /* FLL reference clock divider: divided by 1 */
242 CLOCK_BootToFeeMode(mcgConfig_BOARD_BootClockRUN.oscsel, mcgConfig_BOARD_BootClockRUN.frdiv, in BOARD_BootClockRUN()
300 .frdiv = 0x0U, /* FLL reference clock divider: divided by 32 */
308 .frdiv = 0x0U, /* FLL reference clock divider: divided by 32 */
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKV11Z7/drivers/
Dfsl_clock.c208 uint8_t frdiv; in CLOCK_GetFllExtRefClkFreq() local
213 frdiv = MCG_C1_FRDIV_VAL; in CLOCK_GetFllExtRefClkFreq()
214 freq >>= frdiv; in CLOCK_GetFllExtRefClkFreq()
225 switch (frdiv) in CLOCK_GetFllExtRefClkFreq()
1113 status_t CLOCK_SetFeeMode(uint8_t frdiv, mcg_dmx32_t dmx32, mcg_drs_t drs, void (*fllStableDelay)(v… in CLOCK_SetFeeMode() argument
1143 | MCG_C1_FRDIV(frdiv) /* FRDIV */ in CLOCK_SetFeeMode()
1287 status_t CLOCK_SetFbeMode(uint8_t frdiv, mcg_dmx32_t dmx32, mcg_drs_t drs, void (*fllStableDelay)(v… in CLOCK_SetFbeMode() argument
1322 | MCG_C1_FRDIV(frdiv) /* FRDIV = frdiv */ in CLOCK_SetFbeMode()
1520 …mcg_oscsel_t oscsel, uint8_t frdiv, mcg_dmx32_t dmx32, mcg_drs_t drs, void (*fllStableDelay)(void)) in CLOCK_BootToFeeMode() argument
1524 return CLOCK_SetFeeMode(frdiv, dmx32, drs, fllStableDelay); in CLOCK_BootToFeeMode()
[all …]
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKV10Z1287/drivers/
Dfsl_clock.c208 uint8_t frdiv; in CLOCK_GetFllExtRefClkFreq() local
213 frdiv = MCG_C1_FRDIV_VAL; in CLOCK_GetFllExtRefClkFreq()
214 freq >>= frdiv; in CLOCK_GetFllExtRefClkFreq()
225 switch (frdiv) in CLOCK_GetFllExtRefClkFreq()
1113 status_t CLOCK_SetFeeMode(uint8_t frdiv, mcg_dmx32_t dmx32, mcg_drs_t drs, void (*fllStableDelay)(v… in CLOCK_SetFeeMode() argument
1143 | MCG_C1_FRDIV(frdiv) /* FRDIV */ in CLOCK_SetFeeMode()
1287 status_t CLOCK_SetFbeMode(uint8_t frdiv, mcg_dmx32_t dmx32, mcg_drs_t drs, void (*fllStableDelay)(v… in CLOCK_SetFbeMode() argument
1322 | MCG_C1_FRDIV(frdiv) /* FRDIV = frdiv */ in CLOCK_SetFbeMode()
1520 …mcg_oscsel_t oscsel, uint8_t frdiv, mcg_dmx32_t dmx32, mcg_drs_t drs, void (*fllStableDelay)(void)) in CLOCK_BootToFeeMode() argument
1524 return CLOCK_SetFeeMode(frdiv, dmx32, drs, fllStableDelay); in CLOCK_BootToFeeMode()
[all …]
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKV10Z7/drivers/
Dfsl_clock.c208 uint8_t frdiv; in CLOCK_GetFllExtRefClkFreq() local
218 frdiv = MCG_C1_FRDIV_VAL; in CLOCK_GetFllExtRefClkFreq()
219 freq >>= frdiv; in CLOCK_GetFllExtRefClkFreq()
230 switch (frdiv) in CLOCK_GetFllExtRefClkFreq()
1096 status_t CLOCK_SetFeeMode(uint8_t frdiv, mcg_dmx32_t dmx32, mcg_drs_t drs, void (*fllStableDelay)(v… in CLOCK_SetFeeMode() argument
1126 | MCG_C1_FRDIV(frdiv) /* FRDIV */ in CLOCK_SetFeeMode()
1270 status_t CLOCK_SetFbeMode(uint8_t frdiv, mcg_dmx32_t dmx32, mcg_drs_t drs, void (*fllStableDelay)(v… in CLOCK_SetFbeMode() argument
1305 | MCG_C1_FRDIV(frdiv) /* FRDIV = frdiv */ in CLOCK_SetFbeMode()
1503 …mcg_oscsel_t oscsel, uint8_t frdiv, mcg_dmx32_t dmx32, mcg_drs_t drs, void (*fllStableDelay)(void)) in CLOCK_BootToFeeMode() argument
1507 return CLOCK_SetFeeMode(frdiv, dmx32, drs, fllStableDelay); in CLOCK_BootToFeeMode()
[all …]
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKW41Z4/drivers/
Dfsl_clock.c272 uint8_t frdiv; in CLOCK_GetFllExtRefClkFreq() local
283 frdiv = MCG_C1_FRDIV_VAL; in CLOCK_GetFllExtRefClkFreq()
284 freq >>= frdiv; in CLOCK_GetFllExtRefClkFreq()
299 switch (frdiv) in CLOCK_GetFllExtRefClkFreq()
957 status_t CLOCK_SetFeeMode(uint8_t frdiv, mcg_dmx32_t dmx32, mcg_drs_t drs, void (*fllStableDelay)(v… in CLOCK_SetFeeMode() argument
987 | MCG_C1_FRDIV(frdiv) /* FRDIV */ in CLOCK_SetFeeMode()
1099 status_t CLOCK_SetFbeMode(uint8_t frdiv, mcg_dmx32_t dmx32, mcg_drs_t drs, void (*fllStableDelay)(v… in CLOCK_SetFbeMode() argument
1135 | MCG_C1_FRDIV(frdiv) /* FRDIV = frdiv */ in CLOCK_SetFbeMode()
1256 …mcg_oscsel_t oscsel, uint8_t frdiv, mcg_dmx32_t dmx32, mcg_drs_t drs, void (*fllStableDelay)(void)) in CLOCK_BootToFeeMode() argument
1261 return CLOCK_SetFeeMode(frdiv, dmx32, drs, fllStableDelay); in CLOCK_BootToFeeMode()
[all …]
Dfsl_clock.h559 uint8_t frdiv; /*!< Divider MCG_C1[FRDIV]. */ member
841 static inline void CLOCK_SetFllExtRefDiv(uint8_t frdiv) in CLOCK_SetFllExtRefDiv() argument
843 MCG->C1 = (MCG->C1 & ~MCG_C1_FRDIV_MASK) | MCG_C1_FRDIV(frdiv); in CLOCK_SetFllExtRefDiv()
1033 status_t CLOCK_SetFeeMode(uint8_t frdiv, mcg_dmx32_t dmx32, mcg_drs_t drs, void (*fllStableDelay)(v…
1068 status_t CLOCK_SetFbeMode(uint8_t frdiv, mcg_dmx32_t dmx32, mcg_drs_t drs, void (*fllStableDelay)(v…
1162 …mcg_oscsel_t oscsel, uint8_t frdiv, mcg_dmx32_t dmx32, mcg_drs_t drs, void (*fllStableDelay)(void)…
/hal_nxp-3.6.0/mcux/mcux-sdk/boards/frdmk66f/project_template/
Dclock_config.c238 static void CLOCK_CONFIG_SetFllExtRefDiv(uint8_t frdiv) in CLOCK_CONFIG_SetFllExtRefDiv() argument
240 MCG->C1 = ((MCG->C1 & ~MCG_C1_FRDIV_MASK) | MCG_C1_FRDIV(frdiv)); in CLOCK_CONFIG_SetFllExtRefDiv()
339 .frdiv = 0x0U, /* FLL reference clock divider: divided by 32 */
396 CLOCK_CONFIG_SetFllExtRefDiv(mcgConfig_BOARD_BootClockHSRUN.frdiv); in BOARD_BootClockHSRUN()
465 .frdiv = 0x0U, /* FLL reference clock divider: divided by 32 */
/hal_nxp-3.6.0/mcux/mcux-sdk/boards/frdmk28fa/project_template/
Dclock_config.c237 static void CLOCK_CONFIG_SetFllExtRefDiv(uint8_t frdiv) in CLOCK_CONFIG_SetFllExtRefDiv() argument
239 MCG->C1 = ((MCG->C1 & ~MCG_C1_FRDIV_MASK) | MCG_C1_FRDIV(frdiv)); in CLOCK_CONFIG_SetFllExtRefDiv()
344 .frdiv = 0x0U, /* FLL reference clock divider: divided by 32 */
403 CLOCK_CONFIG_SetFllExtRefDiv(mcgConfig_BOARD_BootClockHSRUN.frdiv); in BOARD_BootClockHSRUN()
463 .frdiv = 0x0U, /* FLL reference clock divider: divided by 1 */
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKM34ZA5/drivers/
Dfsl_clock.h574 uint8_t frdiv; /*!< FLL reference clock divider. */ member
598 uint8_t frdiv; /*!< Divider MCG_C1[FRDIV]. */ member
884 static inline void CLOCK_SetFllExtRefDiv(uint8_t frdiv) in CLOCK_SetFllExtRefDiv() argument
886 MCG->C1 = (uint8_t)((MCG->C1 & ~MCG_C1_FRDIV_MASK) | MCG_C1_FRDIV(frdiv)); in CLOCK_SetFllExtRefDiv()
1188 status_t CLOCK_SetFeeMode(uint8_t frdiv, mcg_dmx32_t dmx32, mcg_drs_t drs, void (*fllStableDelay)(v…
1223 status_t CLOCK_SetFbeMode(uint8_t frdiv, mcg_dmx32_t dmx32, mcg_drs_t drs, void (*fllStableDelay)(v…
1371 …mcg_oscsel_t oscsel, uint8_t frdiv, mcg_dmx32_t dmx32, mcg_drs_t drs, void (*fllStableDelay)(void)…
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK02F12810/drivers/
Dfsl_clock.c229 uint8_t frdiv; in CLOCK_GetFllExtRefClkFreq() local
235 frdiv = MCG_C1_FRDIV_VAL; in CLOCK_GetFllExtRefClkFreq()
236 freq >>= frdiv; in CLOCK_GetFllExtRefClkFreq()
248 switch (frdiv) in CLOCK_GetFllExtRefClkFreq()
1224 status_t CLOCK_SetFeeMode(uint8_t frdiv, mcg_dmx32_t dmx32, mcg_drs_t drs, void (*fllStableDelay)(v… in CLOCK_SetFeeMode() argument
1254 | MCG_C1_FRDIV(frdiv) /* FRDIV */ in CLOCK_SetFeeMode()
1399 status_t CLOCK_SetFbeMode(uint8_t frdiv, mcg_dmx32_t dmx32, mcg_drs_t drs, void (*fllStableDelay)(v… in CLOCK_SetFbeMode() argument
1434 | MCG_C1_FRDIV(frdiv) /* FRDIV = frdiv */ in CLOCK_SetFbeMode()
1633 …mcg_oscsel_t oscsel, uint8_t frdiv, mcg_dmx32_t dmx32, mcg_drs_t drs, void (*fllStableDelay)(void)) in CLOCK_BootToFeeMode() argument
1637 return CLOCK_SetFeeMode(frdiv, dmx32, drs, fllStableDelay); in CLOCK_BootToFeeMode()
[all …]

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