Searched refs:agc_ctrl_0_init (Results 1 – 13 of 13) sorted by relevance
/hal_nxp-3.6.0/mcux/middleware/wireless/framework_5.3.3/XCVR/MKW41Z4/cfgs_kw4x_3x_2x/ |
D | fsl_xcvr_ant_config.c | 107 .agc_ctrl_0_init = XCVR_RX_DIG_AGC_CTRL_0_AGC_DOWN_RSSI_THRESH(0xFF),
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D | fsl_xcvr_ble_config.c | 103 .agc_ctrl_0_init = XCVR_RX_DIG_AGC_CTRL_0_AGC_DOWN_RSSI_THRESH(0xFF),
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D | fsl_xcvr_zgbe_config.c | 90 .agc_ctrl_0_init = XCVR_RX_DIG_AGC_CTRL_0_AGC_DOWN_RSSI_THRESH(0xFF),
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D | fsl_xcvr_gfsk_bt_0p5_h_0p7_config.c | 88 .agc_ctrl_0_init = XCVR_RX_DIG_AGC_CTRL_0_AGC_DOWN_RSSI_THRESH(0xFF),
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D | fsl_xcvr_gfsk_bt_0p5_h_1p0_config.c | 87 .agc_ctrl_0_init = XCVR_RX_DIG_AGC_CTRL_0_AGC_DOWN_RSSI_THRESH(0xFF),
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D | fsl_xcvr_gfsk_bt_0p7_h_0p5_config.c | 88 .agc_ctrl_0_init = XCVR_RX_DIG_AGC_CTRL_0_AGC_DOWN_RSSI_THRESH(0xFF),
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D | fsl_xcvr_msk_config.c | 88 .agc_ctrl_0_init = XCVR_RX_DIG_AGC_CTRL_0_AGC_DOWN_RSSI_THRESH(0xFF),
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D | fsl_xcvr_gfsk_bt_0p3_h_0p5_config.c | 88 .agc_ctrl_0_init = XCVR_RX_DIG_AGC_CTRL_0_AGC_DOWN_RSSI_THRESH(0xFF),
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D | fsl_xcvr_gfsk_bt_0p5_h_0p32_config.c | 88 .agc_ctrl_0_init = XCVR_RX_DIG_AGC_CTRL_0_AGC_DOWN_RSSI_THRESH(0xFF),
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D | fsl_xcvr_gfsk_bt_0p5_h_0p5_config.c | 101 .agc_ctrl_0_init = XCVR_RX_DIG_AGC_CTRL_0_AGC_DOWN_RSSI_THRESH(0xFF),
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D | fsl_xcvr_common_config.c | 217 .agc_ctrl_0_init = XCVR_RX_DIG_AGC_CTRL_0_SLOW_AGC_EN(1) |
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/hal_nxp-3.6.0/mcux/middleware/wireless/framework_5.3.3/XCVR/MKW41Z4/ |
D | fsl_xcvr.h | 580 …uint32_t agc_ctrl_0_init; /* NOTE: Common init and mode init will be OR'd together for AGC_CTRL_0 … member 724 …uint32_t agc_ctrl_0_init; /* NOTE: Common init and mode init will be OR'd together for AGC_CTRL_0… member
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D | fsl_xcvr.c | 772 XCVR_RX_DIG->AGC_CTRL_0 = com_config->agc_ctrl_0_init | mode_config->agc_ctrl_0_init; in XCVR_Configure()
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