1 /*
2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
3 * Copyright 2016-2022 NXP
4 * All rights reserved.
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8
9 #include "fsl_flexcan_edma.h"
10
11 /*******************************************************************************
12 * Definitions
13 ******************************************************************************/
14
15 /* Component ID definition, used by tools. */
16 #ifndef FSL_COMPONENT_ID
17 #define FSL_COMPONENT_ID "platform.drivers.flexcan_edma"
18 #endif
19
20 /*<! Structure definition for flexcan_edma_private_handle_t. The structure is private. */
21 typedef struct _flexcan_edma_private_handle
22 {
23 CAN_Type *base;
24 flexcan_edma_handle_t *handle;
25 } flexcan_edma_private_handle_t;
26
27 /* FlexCAN EDMA transfer handle. */
28 enum _flexcan_edma_tansfer_state
29 {
30 KFLEXCAN_RxFifoIdle = 0U, /* Rx Fifo idle. */
31 KFLEXCAN_RxFifoBusy = 1U, /* Rx Fifo busy. */
32 };
33
34 /*******************************************************************************
35 * Variables
36 ******************************************************************************/
37 /* Array of FlexCAN peripheral base address. */
38 static CAN_Type *const s_flexcanBases[] = CAN_BASE_PTRS;
39
40 /* Private handle only used for internally. */
41 static flexcan_edma_private_handle_t s_flexcanEdmaPrivateHandle[ARRAY_SIZE(s_flexcanBases)];
42
43 /*******************************************************************************
44 * Prototypes
45 ******************************************************************************/
46
47 /*!
48 * @brief FlexCAN EDMA receive finished callback function.
49 *
50 * This function is called when FlexCAN Rx FIFO EDMA receive finished.
51 * It disables the FlexCAN Rx FIFO EDMA request and sends
52 * @ref kStatus_FLEXCAN_RxFifoIdle to FlexCAN EDMA callback.
53 *
54 * @param handle The EDMA handle.
55 * @param param Callback function parameter.
56 */
57 static void FLEXCAN_ReceiveFifoEDMACallback(edma_handle_t *handle, void *param, bool transferDone, uint32_t tcds);
58
59 /*******************************************************************************
60 * Code
61 ******************************************************************************/
FLEXCAN_ReceiveFifoEDMACallback(edma_handle_t * handle,void * param,bool transferDone,uint32_t tcds)62 static void FLEXCAN_ReceiveFifoEDMACallback(edma_handle_t *handle, void *param, bool transferDone, uint32_t tcds)
63 {
64 handle = handle;
65 tcds = tcds;
66 #if (defined(FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO) && FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO)
67 flexcan_fd_frame_t *framefd;
68 uint32_t idHitIndex;
69 #endif
70 flexcan_edma_private_handle_t *flexcanPrivateHandle = (flexcan_edma_private_handle_t *)param;
71
72 /*
73 * $Branch Coverage Justification$
74 * (!transferDone) not covered. Unable to simulate DMA transfer error.
75 */
76 if (transferDone)
77 {
78 #if (defined(FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO) && FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO)
79 if (0U != (flexcanPrivateHandle->base->ERFCR & CAN_ERFCR_ERFEN_MASK))
80 {
81 framefd = flexcanPrivateHandle->handle->framefd;
82 for (uint32_t i = 0; i < flexcanPrivateHandle->handle->frameNum; i++)
83 {
84 /* Enhanced Rx FIFO ID HIT offset is changed dynamically according to data length code (DLC) . */
85 idHitIndex = (DLC_LENGTH_DECODE(framefd->length) + 3U) / 4U;
86 framefd->idhit = framefd->dataWord[idHitIndex];
87 /* Clear the unused frame data. */
88 for (uint32_t j = idHitIndex; j < 16U; j++)
89 {
90 framefd->dataWord[j] = 0x0U;
91 }
92 framefd++;
93 }
94 }
95 #endif
96 /* Disable transfer. */
97 FLEXCAN_TransferAbortReceiveFifoEDMA(flexcanPrivateHandle->base, flexcanPrivateHandle->handle);
98
99 if (NULL != flexcanPrivateHandle->handle->callback)
100 {
101 flexcanPrivateHandle->handle->callback(flexcanPrivateHandle->base, flexcanPrivateHandle->handle,
102 kStatus_FLEXCAN_RxFifoIdle, flexcanPrivateHandle->handle->userData);
103 }
104 }
105 }
106
107 /*!
108 * brief Initializes the FlexCAN handle, which is used in transactional functions.
109 *
110 * param base FlexCAN peripheral base address.
111 * param handle Pointer to flexcan_edma_handle_t structure.
112 * param callback The callback function.
113 * param userData The parameter of the callback function.
114 * param rxFifoEdmaHandle User-requested DMA handle for Rx FIFO DMA transfer.
115 */
FLEXCAN_TransferCreateHandleEDMA(CAN_Type * base,flexcan_edma_handle_t * handle,flexcan_edma_transfer_callback_t callback,void * userData,edma_handle_t * rxFifoEdmaHandle)116 void FLEXCAN_TransferCreateHandleEDMA(CAN_Type *base,
117 flexcan_edma_handle_t *handle,
118 flexcan_edma_transfer_callback_t callback,
119 void *userData,
120 edma_handle_t *rxFifoEdmaHandle)
121 {
122 assert(NULL != handle);
123
124 uint32_t instance = FLEXCAN_GetInstance(base);
125 s_flexcanEdmaPrivateHandle[instance].base = base;
126 s_flexcanEdmaPrivateHandle[instance].handle = handle;
127
128 (void)memset(handle, 0, sizeof(flexcan_edma_handle_t));
129
130 handle->rxFifoState = (uint8_t)KFLEXCAN_RxFifoIdle;
131 handle->rxFifoEdmaHandle = rxFifoEdmaHandle;
132
133 /* Register Callback. */
134 handle->callback = callback;
135 handle->userData = userData;
136
137 /* Configure Legacy/Enhanced Rx FIFO DMA callback. */
138 EDMA_SetCallback(handle->rxFifoEdmaHandle, FLEXCAN_ReceiveFifoEDMACallback, &s_flexcanEdmaPrivateHandle[instance]);
139 }
140
141 /*!
142 * brief Prepares the eDMA transfer configuration for FLEXCAN Legacy RX FIFO.
143 *
144 * This function prepares the eDMA transfer configuration structure according to FLEXCAN Legacy RX FIFO.
145 *
146 * param base FlexCAN peripheral base address.
147 * param pFifoXfer FlexCAN Rx FIFO EDMA transfer structure, see #flexcan_fifo_transfer_t.
148 * param pEdmaConfig The user configuration structure of type edma_transfer_t.
149 *
150 */
FLEXCAN_PrepareTransfConfiguration(CAN_Type * base,flexcan_fifo_transfer_t * pFifoXfer,edma_transfer_config_t * pEdmaConfig)151 void FLEXCAN_PrepareTransfConfiguration(CAN_Type *base,
152 flexcan_fifo_transfer_t *pFifoXfer,
153 edma_transfer_config_t *pEdmaConfig)
154 {
155 assert(NULL != pFifoXfer);
156 assert(NULL != pFifoXfer->frame);
157 assert(NULL != pEdmaConfig);
158
159 flexcan_frame_t *fifoAddr = (flexcan_frame_t *)FLEXCAN_GetRxFifoHeadAddr(base);
160
161 #if (defined(FSL_FEATURE_EDMA_SUPPORT_16_BYTES_TRANSFER) && FSL_FEATURE_EDMA_SUPPORT_16_BYTES_TRANSFER)
162 EDMA_PrepareTransfer(pEdmaConfig, (void *)fifoAddr, sizeof(flexcan_frame_t), (void *)pFifoXfer->frame,
163 sizeof(uint32_t), sizeof(flexcan_frame_t), sizeof(flexcan_frame_t) * pFifoXfer->frameNum,
164 kEDMA_PeripheralToMemory);
165 #else
166 /* The Data Size of FLEXCAN Legacy RX FIFO output port is 16 Bytes, but lots of chips not support 16Bytes width DMA
167 * transfer. These chips always support 4Byte width memory transfer, so we need prepare Memory to Memory mode by 4
168 * Bytes width mode.
169 */
170 EDMA_PrepareTransfer(pEdmaConfig, (void *)fifoAddr, 4U, (void *)pFifoXfer->frame, sizeof(uint32_t),
171 sizeof(flexcan_frame_t), sizeof(flexcan_frame_t) * pFifoXfer->frameNum, kEDMA_MemoryToMemory);
172 #endif
173 }
174
175 /*!
176 * brief Start Transfer Data from the FLEXCAN Legacy Rx FIFO using eDMA.
177 *
178 * This function to Update edma transfer confiugration and Start eDMA transfer
179 *
180 * param base FlexCAN peripheral base address.
181 * param handle Pointer to flexcan_edma_handle_t structure.
182 * param pEdmaConfig The user configuration structure of type edma_transfer_t.
183 * retval kStatus_Success if succeed, others failed.
184 * retval kStatus_FLEXCAN_RxFifoBusy Previous transfer ongoing.
185 */
FLEXCAN_StartTransferDatafromRxFIFO(CAN_Type * base,flexcan_edma_handle_t * handle,edma_transfer_config_t * pEdmaConfig)186 status_t FLEXCAN_StartTransferDatafromRxFIFO(CAN_Type *base,
187 flexcan_edma_handle_t *handle,
188 edma_transfer_config_t *pEdmaConfig)
189 {
190 assert(NULL != handle->rxFifoEdmaHandle);
191 assert(NULL != pEdmaConfig);
192 status_t status;
193
194 /* If previous Rx FIFO receive not finished. */
195 if ((uint8_t)KFLEXCAN_RxFifoBusy == handle->rxFifoState)
196 {
197 status = kStatus_FLEXCAN_RxFifoBusy;
198 }
199 else
200 {
201 handle->rxFifoState = (uint8_t)KFLEXCAN_RxFifoBusy;
202
203 /* Enable FlexCAN Rx FIFO EDMA. */
204 FLEXCAN_EnableRxFifoDMA(base, true);
205
206 /* Submit configuration. */
207 (void)EDMA_SubmitTransfer(handle->rxFifoEdmaHandle, (const edma_transfer_config_t *)pEdmaConfig);
208 EDMA_SetModulo(handle->rxFifoEdmaHandle->base, handle->rxFifoEdmaHandle->channel, kEDMA_Modulo16bytes,
209 kEDMA_ModuloDisable);
210 /* Start transfer. */
211 EDMA_StartTransfer(handle->rxFifoEdmaHandle);
212
213 status = kStatus_Success;
214 }
215
216 return status;
217 }
218
219 /*!
220 * brief Receives the CAN Messages from the Legacy Rx FIFO using eDMA.
221 *
222 * This function receives the CAN Message using eDMA. This is a non-blocking function, which returns
223 * right away. After the CAN Message is received, the receive callback function is called.
224 *
225 * param base FlexCAN peripheral base address.
226 * param handle Pointer to flexcan_edma_handle_t structure.
227 * param pFifoXfer FlexCAN Rx FIFO EDMA transfer structure, see #flexcan_fifo_transfer_t.
228 * retval kStatus_Success if succeed, others failed.
229 * retval kStatus_FLEXCAN_RxFifoBusy Previous transfer ongoing.
230 */
FLEXCAN_TransferReceiveFifoEDMA(CAN_Type * base,flexcan_edma_handle_t * handle,flexcan_fifo_transfer_t * pFifoXfer)231 status_t FLEXCAN_TransferReceiveFifoEDMA(CAN_Type *base,
232 flexcan_edma_handle_t *handle,
233 flexcan_fifo_transfer_t *pFifoXfer)
234 {
235 assert(NULL != handle->rxFifoEdmaHandle);
236 assert(NULL != pFifoXfer->frame);
237
238 edma_transfer_config_t dmaXferConfig = {0};
239 status_t status;
240
241 handle->frameNum = pFifoXfer->frameNum;
242 /* Prepare transfer. */
243 FLEXCAN_PrepareTransfConfiguration(base, pFifoXfer, &dmaXferConfig);
244
245 /* Submit configuration and start edma transfer. */
246 status = FLEXCAN_StartTransferDatafromRxFIFO(base, handle, &dmaXferConfig);
247
248 return status;
249 }
250
251 /*!
252 * brief Gets the Legacy Rx Fifo transfer status during a interrupt non-blocking receive.
253 *
254 * param base FlexCAN peripheral base address.
255 * param handle FlexCAN handle pointer.
256 * param count Number of CAN messages receive so far by the non-blocking transaction.
257 * retval kStatus_InvalidArgument count is Invalid.
258 * retval kStatus_Success Successfully return the count.
259 */
260
FLEXCAN_TransferGetReceiveFifoCountEMDA(CAN_Type * base,flexcan_edma_handle_t * handle,size_t * count)261 status_t FLEXCAN_TransferGetReceiveFifoCountEMDA(CAN_Type *base, flexcan_edma_handle_t *handle, size_t *count)
262 {
263 assert(NULL != handle);
264
265 status_t result = kStatus_Success;
266
267 if (handle->rxFifoState == (uint32_t)KFLEXCAN_RxFifoIdle)
268 {
269 result = kStatus_NoTransferInProgress;
270 }
271 else
272 {
273 *count = handle->frameNum -
274 EDMA_GetRemainingMajorLoopCount(handle->rxFifoEdmaHandle->base, handle->rxFifoEdmaHandle->channel);
275 }
276
277 return result;
278 }
279
280 /*!
281 * brief Aborts the receive Legacy/Enhanced Rx FIFO process which used eDMA.
282 *
283 * This function aborts the receive Legacy/Enhanced Rx FIFO process which used eDMA.
284 *
285 * param base FlexCAN peripheral base address.
286 * param handle Pointer to flexcan_edma_handle_t structure.
287 */
FLEXCAN_TransferAbortReceiveFifoEDMA(CAN_Type * base,flexcan_edma_handle_t * handle)288 void FLEXCAN_TransferAbortReceiveFifoEDMA(CAN_Type *base, flexcan_edma_handle_t *handle)
289 {
290 assert(NULL != handle->rxFifoEdmaHandle);
291
292 /* Stop transfer. */
293 EDMA_AbortTransfer(handle->rxFifoEdmaHandle);
294
295 handle->rxFifoState = (uint8_t)KFLEXCAN_RxFifoIdle;
296 #if (defined(FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO) && FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO)
297 handle->framefd = NULL;
298 #endif
299 handle->frameNum = 0U;
300 /* Disable FlexCAN Legacy/Enhanced Rx FIFO EDMA. */
301 FLEXCAN_EnableRxFifoDMA(base, false);
302 }
303
304 #if (defined(FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO) && FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO)
305 /*!
306 * brief Receives the CAN FD Message from the Enhanced Rx FIFO using eDMA.
307 *
308 * This function receives the CAN FD Message using eDMA. This is a non-blocking function, which returns
309 * right away. After the CAN Message is received, the receive callback function is called.
310 *
311 * param base FlexCAN peripheral base address.
312 * param handle Pointer to flexcan_edma_handle_t structure.
313 * param pFifoXfer FlexCAN Rx FIFO EDMA transfer structure, see #flexcan_fifo_transfer_t.
314 * retval kStatus_Success if succeed, others failed.
315 * retval kStatus_FLEXCAN_RxFifoBusy Previous transfer ongoing.
316 * retval kStatus_InvalidArgument The watermark configuration is invalid, the watermark need be set to
317 1 to do successfully EDMA transfer with this API.
318 */
FLEXCAN_TransferReceiveEnhancedFifoEDMA(CAN_Type * base,flexcan_edma_handle_t * handle,flexcan_fifo_transfer_t * pFifoXfer)319 status_t FLEXCAN_TransferReceiveEnhancedFifoEDMA(CAN_Type *base,
320 flexcan_edma_handle_t *handle,
321 flexcan_fifo_transfer_t *pFifoXfer)
322 {
323 assert(NULL != handle->rxFifoEdmaHandle);
324 assert(NULL != pFifoXfer->framefd);
325
326 edma_transfer_config_t dmaXferConfig;
327 status_t status;
328 flexcan_fd_frame_t *fifoAddr = (flexcan_fd_frame_t *)E_RX_FIFO(base);
329 uint32_t perReadWords = ((base->ERFCR & CAN_ERFCR_DMALW_MASK) >> CAN_ERFCR_DMALW_SHIFT) + 1U;
330 uint32_t watermark = ((base->ERFCR & CAN_ERFCR_ERFWM_MASK) >> CAN_ERFCR_ERFWM_SHIFT) + 1U;
331
332 /* If previous Rx FIFO receive not finished. */
333 if ((uint8_t)KFLEXCAN_RxFifoBusy == handle->rxFifoState)
334 {
335 status = kStatus_FLEXCAN_RxFifoBusy;
336 }
337 else
338 {
339 handle->frameNum = pFifoXfer->frameNum;
340 handle->framefd = pFifoXfer->framefd;
341 /*!< To reduce the complexity of DMA software configuration, need to set watermark to 1 to make that each DMA
342 request read once Rx FIFO. Because a DMA transfer cannot be dynamically changed, Number of words read per
343 transfer (ERFCR[DMALW] + 1) should be programmed so that the Enhanced Rx FIFO element can store the largest
344 CAN message present on the CAN bus. */
345 if ((watermark != 1U) || ((sizeof(uint32_t) * perReadWords) != sizeof(flexcan_fd_frame_t)))
346 {
347 return kStatus_InvalidArgument;
348 }
349
350 /* Prepare transfer. */
351 EDMA_PrepareTransfer(
352 &dmaXferConfig, (void *)fifoAddr, sizeof(uint32_t), (void *)pFifoXfer->framefd, sizeof(uint32_t),
353 sizeof(uint32_t) * perReadWords, /* minor loop bytes : 4* perReadWords */
354 sizeof(uint32_t) * perReadWords * handle->frameNum, /* major loop counts : handle->frameNum */
355 kEDMA_MemoryToMemory);
356 /* Submit configuration. */
357 (void)EDMA_SubmitTransfer(handle->rxFifoEdmaHandle, &dmaXferConfig);
358 handle->rxFifoEdmaHandle->base->CH[handle->rxFifoEdmaHandle->channel].TCD_NBYTES_MLOFFYES &=
359 ~DMA_TCD_NBYTES_MLOFFYES_MLOFF_MASK;
360 handle->rxFifoEdmaHandle->base->CH[handle->rxFifoEdmaHandle->channel].TCD_NBYTES_MLOFFYES |=
361 DMA_TCD_NBYTES_MLOFFYES_MLOFF(128U - sizeof(uint32_t) * perReadWords) | DMA_TCD_NBYTES_MLOFFYES_SMLOE_MASK;
362 handle->rxFifoEdmaHandle->base->CH[handle->rxFifoEdmaHandle->channel].TCD_ATTR &=
363 ~(uint16_t)DMA_TCD_ATTR_SMOD_MASK;
364 handle->rxFifoEdmaHandle->base->CH[handle->rxFifoEdmaHandle->channel].TCD_ATTR |= DMA_TCD_ATTR_SMOD(7U);
365 handle->rxFifoState = (uint8_t)KFLEXCAN_RxFifoBusy;
366
367 /* Enable FlexCAN Rx FIFO EDMA. */
368 FLEXCAN_EnableRxFifoDMA(base, true);
369 /* Start transfer. */
370 EDMA_StartTransfer(handle->rxFifoEdmaHandle);
371
372 status = kStatus_Success;
373 }
374
375 return status;
376 }
377 #endif
378
