1 /*
2 * Copyright (c) 2016, Freescale Semiconductor, Inc.
3 * Copyright 2016-2021 NXP
4 * All rights reserved.
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8
9 #ifndef _FSL_DAC12_H_
10 #define _FSL_DAC12_H_
11
12 #include "fsl_common.h"
13
14 /*!
15 * @addtogroup dac12
16 * @{
17 */
18
19 /*! @file */
20
21 /*******************************************************************************
22 * Definitions
23 ******************************************************************************/
24
25 /*! @name Driver version */
26 /*@{*/
27 /*! @brief DAC12 driver version 2.1.0. */
28 #define FSL_DAC12_DRIVER_VERSION (MAKE_VERSION(2, 1, 0))
29 /*@}*/
30
31 /*! @brief Define "write 1 to clear" flags. */
32 #define DAC12_CR_W1C_FLAGS_MASK (DAC_CR_OVFF_MASK | DAC_CR_UDFF_MASK)
33 /*! @brief Define all the flag bits in DACx_CR register. */
34 #define DAC12_CR_ALL_FLAGS_MASK (DAC12_CR_W1C_FLAGS_MASK | DAC_CR_WMF_MASK | DAC_CR_NEMPTF_MASK | DAC_CR_FULLF_MASK)
35
36 /*!
37 * @brief DAC12 flags.
38 */
39 enum _dac12_status_flags
40 {
41 kDAC12_OverflowFlag = DAC_CR_OVFF_MASK, /*!< FIFO overflow status flag, which indicates that more data has been
42 written into FIFO than it can hold. */
43 kDAC12_UnderflowFlag = DAC_CR_UDFF_MASK, /*!< FIFO underflow status flag, which means that there is a new trigger
44 after the FIFO is nearly empty. */
45 kDAC12_WatermarkFlag = DAC_CR_WMF_MASK, /*!< FIFO wartermark status flag, which indicates the remaining FIFO data is
46 less than the watermark setting. */
47 kDAC12_NearlyEmptyFlag = DAC_CR_NEMPTF_MASK, /*!< FIFO nearly empty flag, which means there is only one data
48 remaining in FIFO. */
49 kDAC12_FullFlag = DAC_CR_FULLF_MASK /*!< FIFO full status flag, which means that the FIFO read pointer equals the
50 write pointer, as the write pointer increase. */
51 };
52
53 /*!
54 * @brief DAC12 interrupts.
55 */
56 enum _dac12_interrupt_enable
57 {
58 kDAC12_UnderOrOverflowInterruptEnable = DAC_CR_UVIE_MASK, /*!< Underflow and overflow interrupt enable. */
59 kDAC12_WatermarkInterruptEnable = DAC_CR_WTMIE_MASK, /*!< Watermark interrupt enable. */
60 kDAC12_NearlyEmptyInterruptEnable = DAC_CR_EMPTIE_MASK, /*!< Nearly empty interrupt enable. */
61 kDAC12_FullInterruptEnable = DAC_CR_FULLIE_MASK /*!< Full interrupt enable. */
62 };
63
64 /*!
65 * @brief DAC12 FIFO size information provided by hardware.
66 */
67 typedef enum _dac12_fifo_size_info
68 {
69 kDAC12_FIFOSize2 = 0U, /*!< FIFO depth is 2. */
70 kDAC12_FIFOSize4 = 1U, /*!< FIFO depth is 4. */
71 kDAC12_FIFOSize8 = 2U, /*!< FIFO depth is 8. */
72 kDAC12_FIFOSize16 = 3U, /*!< FIFO depth is 16. */
73 kDAC12_FIFOSize32 = 4U, /*!< FIFO depth is 32. */
74 kDAC12_FIFOSize64 = 5U, /*!< FIFO depth is 64. */
75 kDAC12_FIFOSize128 = 6U, /*!< FIFO depth is 128. */
76 kDAC12_FIFOSize256 = 7U, /*!< FIFO depth is 256. */
77 } dac12_fifo_size_info_t;
78
79 /*!
80 * @brief DAC12 FIFO work mode.
81 */
82 typedef enum _dac12_fifo_work_mode
83 {
84 kDAC12_FIFODisabled = 0U, /*!< FIFO disabled and only one level buffer is enabled. Any data written from this buffer
85 goes to conversion. */
86 kDAC12_FIFOWorkAsNormalMode = 1U, /*!< Data will first read from FIFO to buffer then go to conversion. */
87 kDAC12_FIFOWorkAsSwingMode = 2U /*!< In Swing mode, the FIFO must be set up to be full. In Swing back mode, a
88 trigger changes the read pointer to make it swing between the FIFO Full and
89 Nearly Empty state. That is, the trigger increases the read pointer till FIFO
90 is nearly empty and decreases the read pointer till the FIFO is full. */
91 } dac12_fifo_work_mode_t;
92
93 /*!
94 * @brief DAC12 reference voltage source.
95 */
96 typedef enum _dac12_reference_voltage_source
97 {
98 kDAC12_ReferenceVoltageSourceAlt1 = 0U, /*!< The DAC selects DACREF_1 as the reference voltage. */
99 kDAC12_ReferenceVoltageSourceAlt2 = 1U, /*!< The DAC selects DACREF_2 as the reference voltage. */
100 } dac12_reference_voltage_source_t;
101
102 /*!
103 * @brief DAC12 FIFO trigger mode.
104 */
105 typedef enum _dac12_fifo_trigger_mode
106 {
107 kDAC12_FIFOTriggerByHardwareMode = 0U, /*!< Buffer would be triggered by hardware. */
108 kDAC12_FIFOTriggerBySoftwareMode = 1U, /*!< Buffer would be triggered by software. */
109 } dac12_fifo_trigger_mode_t;
110
111 /*!
112 * @brief DAC internal reference current source.
113 *
114 * Analog module needs reference current to keep working . Such reference current can generated by IP itself, or by
115 * on-chip PMC's "reference part". If no current reference be selected, analog module can’t working normally ,even when
116 * other register can still be assigned, DAC would waste current but no function.
117 * To make the DAC work, either kDAC12_ReferenceCurrentSourceAltx should be selected.
118 */
119 typedef enum _dac12_reference_current_source
120 {
121 kDAC12_ReferenceCurrentSourceDisabled = 0U, /*!< None of reference current source is enabled. */
122 kDAC12_ReferenceCurrentSourceAlt0 = 1U, /*!< Use the internal reference current generated by the module itself. */
123 kDAC12_ReferenceCurrentSourceAlt1 = 2U, /*!< Use the ZTC(Zero Temperature Coefficient) reference current generated
124 by on-chip power management module. */
125 kDAC12_ReferenceCurrentSourceAlt2 = 3U, /*!< Use the PTAT(Proportional To Absolution Temperature) reference current
126 generated by power management module. */
127 } dac12_reference_current_source_t;
128
129 /*!
130 * @brief DAC analog buffer speed mode for conversion.
131 */
132 typedef enum _dac12_speed_mode
133 {
134 kDAC12_SpeedLowMode = 0U, /*!< Low speed mode. */
135 kDAC12_SpeedMiddleMode = 1U, /*!< Middle speed mode. */
136 kDAC12_SpeedHighMode = 2U, /*!< High speed mode. */
137 } dac12_speed_mode_t;
138
139 /*!
140 * @brief DAC12 hardware information.
141 */
142 typedef struct _dac12_hardware_info
143 {
144 dac12_fifo_size_info_t fifoSizeInfo; /*!< The number of words in this device's DAC buffer. */
145 } dac12_hardware_info_t;
146
147 /*!
148 * @brief DAC12 module configuration.
149 *
150 * Actually, the most fields are for FIFO buffer.
151 */
152 typedef struct
153 {
154 uint32_t fifoWatermarkLevel; /*!< FIFO's watermark, the max value can be the hardware FIFO size. */
155 dac12_fifo_work_mode_t fifoWorkMode; /*!< FIFI's work mode about pointers. */
156 dac12_reference_voltage_source_t referenceVoltageSource; /*!< Select the reference voltage source. */
157 dac12_fifo_trigger_mode_t fifoTriggerMode; /*! Select the trigger mode for FIFO. */
158
159 /* Analog part configuration. */
160 dac12_reference_current_source_t referenceCurrentSource; /*!< Select the reference current source. */
161 dac12_speed_mode_t speedMode; /*!< Select the speed mode for conversion. */
162 bool enableAnalogBuffer; /*!< Enable analog buffer for high drive. */
163 #if !(defined(FSL_FEATURE_DAC12_HAS_NO_ITRM_REGISTER) && FSL_FEATURE_DAC12_HAS_NO_ITRM_REGISTER)
164 uint32_t currentReferenceInternalTrimValue; /*!< Internal reference current trim value. 3-bit value is available.*/
165 #endif /* FSL_FEATURE_DAC12_HAS_NO_ITRM_REGISTER */
166 } dac12_config_t;
167
168 /*******************************************************************************
169 * API
170 ******************************************************************************/
171 #if defined(__cplusplus)
172 extern "C" {
173 #endif
174
175 /*!
176 * @name Initialization and de-initialization
177 * @{
178 */
179
180 /*!
181 * @brief Get hardware information about this module.
182 *
183 * @param base DAC12 peripheral base address.
184 * @param info Pointer to info structure, see to #dac12_hardware_info_t.
185 */
186 void DAC12_GetHardwareInfo(DAC_Type *base, dac12_hardware_info_t *info);
187
188 /*!
189 * @brief Initialize the DAC12 module.
190 *
191 * @param base DAC12 peripheral base address.
192 * @param config Pointer to configuration structure, see to #dac12_config_t.
193 */
194 void DAC12_Init(DAC_Type *base, const dac12_config_t *config);
195
196 /*!
197 * @brief Initializes the DAC12 user configuration structure.
198 *
199 * This function initializes the user configuration structure to a default value. The default values are:
200 * @code
201 * config->fifoWatermarkLevel = 0U;
202 * config->fifoWorkMode = kDAC12_FIFODisabled;
203 * config->referenceVoltageSource = kDAC12_ReferenceVoltageSourceAlt1;
204 * config->fifoTriggerMode = kDAC12_FIFOTriggerByHardwareMode;
205 * config->referenceCurrentSource = kDAC12_ReferenceCurrentSourceAlt0;
206 * config->speedMode = kDAC12_SpeedLowMode;
207 * config->speedMode = false;
208 * config->currentReferenceInternalTrimValue = 0x4;
209 * @endcode
210 * @param config Pointer to the configuration structure. See "dac12_config_t".
211 */
212 void DAC12_GetDefaultConfig(dac12_config_t *config);
213
214 /*!
215 * @brief De-initialize the DAC12 module.
216 *
217 * @param base DAC12 peripheral base address.
218 */
219 void DAC12_Deinit(DAC_Type *base);
220
221 /*!
222 * @brief Enable the DAC12's converter or not.
223 *
224 * @param base DAC12 peripheral base address.
225 * @param enable Enable the DAC12's converter or not.
226 */
DAC12_Enable(DAC_Type * base,bool enable)227 static inline void DAC12_Enable(DAC_Type *base, bool enable)
228 {
229 if (enable)
230 {
231 base->CR = (base->CR & ~DAC12_CR_W1C_FLAGS_MASK) | DAC_CR_DACEN_MASK;
232 }
233 else
234 {
235 base->CR &= ~DAC_CR_DACEN_MASK;
236 }
237 }
238
239 /*!
240 * @brief Reset all internal logic and registers.
241 *
242 * @param base DAC12 peripheral base address.
243 */
DAC12_ResetConfig(DAC_Type * base)244 static inline void DAC12_ResetConfig(DAC_Type *base)
245 {
246 base->CR = DAC_CR_SWRST_MASK;
247 }
248
249 /*!
250 * @brief Reset the FIFO pointers.
251 *
252 * FIFO pointers should only be reset when the DAC12 is disabled. This function can be used to configure both pointers
253 * to the same address to reset the FIFO as empty.
254 *
255 * @param base DAC12 peripheral base address.
256 */
DAC12_ResetFIFO(DAC_Type * base)257 static inline void DAC12_ResetFIFO(DAC_Type *base)
258 {
259 /* FIFO pointers should only be reset when the module is disabled. */
260 base->CR = (base->CR & ~DAC12_CR_W1C_FLAGS_MASK) | DAC_CR_FIFORST_MASK;
261 }
262
263 /* @} */
264
265 /*!
266 * @name Status
267 * @{
268 */
269
270 /*!
271 * @brief Get status flags.
272 *
273 * @param base DAC12 peripheral base address.
274 * @return Mask of current status flags. See to #_dac12_status_flags.
275 */
DAC12_GetStatusFlags(DAC_Type * base)276 static inline uint32_t DAC12_GetStatusFlags(DAC_Type *base)
277 {
278 return (DAC12_CR_ALL_FLAGS_MASK & base->CR);
279 }
280
281 /*!
282 * @brief Clear status flags.
283 *
284 * Note: Not all the flags can be cleared by this API. Several flags need special condition to clear them according to
285 * target chip's reference manual document.
286 *
287 * @param base DAC12 peripheral base address.
288 * @param flags Mask of status flags to be cleared. See to #_dac12_status_flags.
289 */
DAC12_ClearStatusFlags(DAC_Type * base,uint32_t flags)290 static inline void DAC12_ClearStatusFlags(DAC_Type *base, uint32_t flags)
291 {
292 base->CR |= (flags & DAC12_CR_W1C_FLAGS_MASK);
293 }
294
295 /* @} */
296
297 /*!
298 * @name Interrupts
299 * @{
300 */
301
302 /*!
303 * @brief Enable interrupts.
304 *
305 * @param base DAC12 peripheral base address.
306 * @param mask Mask value of interrupts to be enabled. See to #_dac12_interrupt_enable.
307 */
DAC12_EnableInterrupts(DAC_Type * base,uint32_t mask)308 static inline void DAC12_EnableInterrupts(DAC_Type *base, uint32_t mask)
309 {
310 base->CR = (base->CR & ~DAC12_CR_W1C_FLAGS_MASK) | mask;
311 }
312
313 /*!
314 * @brief Disable interrupts.
315 *
316 * @param base DAC12 peripheral base address.
317 * @param mask Mask value of interrupts to be disabled. See to #_dac12_interrupt_enable.
318 */
DAC12_DisableInterrupts(DAC_Type * base,uint32_t mask)319 static inline void DAC12_DisableInterrupts(DAC_Type *base, uint32_t mask)
320 {
321 base->CR &= ~mask;
322 }
323
324 /* @} */
325
326 /*!
327 * @name DMA control
328 * @{
329 */
330
331 /*!
332 * @brief Enable DMA or not.
333 *
334 * When DMA is enabled, the DMA request will be generated by original interrupts. The interrupts will not be presented
335 * on this module at the same time.
336 */
DAC12_EnableDMA(DAC_Type * base,bool enable)337 static inline void DAC12_EnableDMA(DAC_Type *base, bool enable)
338 {
339 if (enable)
340 {
341 base->CR = (base->CR & ~DAC12_CR_W1C_FLAGS_MASK) | DAC_CR_DMAEN_MASK;
342 }
343 else
344 {
345 base->CR &= ~DAC_CR_DMAEN_MASK;
346 }
347 }
348
349 /* @} */
350
351 /*!
352 * @name Functional feature
353 * @{
354 */
355
356 /*!
357 * @brief Set data into the entry of FIFO buffer.
358 *
359 * When the DAC FIFO is disabled, and the one entry buffer is enabled, the DAC converts the data in the buffer to analog
360 * output voltage. Any write to the DATA register will replace the data in the buffer and push data to analog conversion
361 * without trigger support.
362 * When the DAC FIFO is enabled. Writing data would increase the write pointer of FIFO. Also, the data would be restored
363 * into the FIFO buffer.
364 *
365 * @param base DAC12 peripheral base address.
366 * @param value Setting value into FIFO buffer.
367 */
DAC12_SetData(DAC_Type * base,uint32_t value)368 static inline void DAC12_SetData(DAC_Type *base, uint32_t value)
369 {
370 /* The module is connected internally to a 32-bit interface.
371 * For the 8-bit or 16-bit, the write might be ignored. */
372 base->DATA = DAC_DATA_DATA0(value);
373 }
374
375 /*!
376 * @brief Do trigger the FIFO by software.
377 *
378 * When the DAC FIFO is enabled, and software trigger is used. Doing trigger would increase the read pointer, and the
379 * data in the entry pointed by read pointer would be converted as new output.
380 *
381 * @param base DAC12 peripheral base address.
382 */
DAC12_DoSoftwareTrigger(DAC_Type * base)383 static inline void DAC12_DoSoftwareTrigger(DAC_Type *base)
384 {
385 base->CR = (base->CR & ~DAC12_CR_W1C_FLAGS_MASK) | DAC_CR_SWTRG_MASK;
386 }
387
388 /*!
389 * @brief Get the current read pointer of FIFO.
390 *
391 * @param base DAC12 peripheral base address.
392 * @return Read pointer index of FIFO buffer.
393 */
DAC12_GetFIFOReadPointer(DAC_Type * base)394 static inline uint32_t DAC12_GetFIFOReadPointer(DAC_Type *base)
395 {
396 return (DAC_PTR_DACRFP_MASK & base->PTR) >> DAC_PTR_DACRFP_SHIFT;
397 }
398
399 /*!
400 * @brief Get the current write pointer of FIFO.
401 *
402 * @param base DAC12 peripheral base address.
403 * @return Write pointer index of FIFO buffer
404 */
DAC12_GetFIFOWritePointer(DAC_Type * base)405 static inline uint32_t DAC12_GetFIFOWritePointer(DAC_Type *base)
406 {
407 return (DAC_PTR_DACWFP_MASK & base->PTR) >> DAC_PTR_DACWFP_SHIFT;
408 }
409
410 /* @} */
411
412 #if defined(__cplusplus)
413 }
414 #endif
415 /*!
416 * @}
417 */
418 #endif /* _FSL_DAC12_H_ */
419
