/hal_nxp-3.6.0/imx/devices/MCIMX6X/ |
D | MCIMX6X_M4.h | 23926 …__IO uint32_t VDCTRL0_CLR; /**< eLCDIF VSYNC Mode and Dotclk Mode Cont… member 24025 #define LCDIF_VDCTRL0_CLR_REG(base) ((base)->VDCTRL0_CLR)
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/hal_nxp-3.6.0/imx/devices/MCIMX7D/ |
D | MCIMX7D_M4.h | 28067 …__IO uint32_t VDCTRL0_CLR; /**< eLCDIF VSYNC Mode and Dotclk Mode Cont… member 28166 #define LCDIF_VDCTRL0_CLR_REG(base) ((base)->VDCTRL0_CLR)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MCIMX7U3/ |
D | MCIMX7U3_cm4.h | 9539 …__IO uint32_t VDCTRL0_CLR; /**< LCDIF VSYNC Mode and Dotclk Mode Control Reg… member
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MCIMX7U5/ |
D | MCIMX7U5_cm4.h | 9540 …__IO uint32_t VDCTRL0_CLR; /**< LCDIF VSYNC Mode and Dotclk Mode Control Reg… member
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1042/ |
D | MIMXRT1042.h | 28092 …__IO uint32_t VDCTRL0_CLR; /**< LCDIF VSYNC Mode and Dotclk Mode Control Reg… member
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1052/ |
D | MIMXRT1052.h | 27381 …__IO uint32_t VDCTRL0_CLR; /**< LCDIF VSYNC Mode and Dotclk Mode Control Reg… member
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MN2/ |
D | MIMX8MN2_cm7.h | 37229 …__IO uint32_t VDCTRL0_CLR; /**< LCDIF VSYNC Mode and Dotclk Mode Control Reg… member
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MN5/ |
D | MIMX8MN5_cm7.h | 37231 …__IO uint32_t VDCTRL0_CLR; /**< LCDIF VSYNC Mode and Dotclk Mode Control Reg… member
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MN3/ |
D | MIMX8MN3_cm7.h | 37231 …__IO uint32_t VDCTRL0_CLR; /**< LCDIF VSYNC Mode and Dotclk Mode Control Reg… member
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MN4/ |
D | MIMX8MN4_cm7.h | 37229 …__IO uint32_t VDCTRL0_CLR; /**< LCDIF VSYNC Mode and Dotclk Mode Control Reg… member
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MN1/ |
D | MIMX8MN1_cm7.h | 37231 …__IO uint32_t VDCTRL0_CLR; /**< LCDIF VSYNC Mode and Dotclk Mode Control Reg… member
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MN6/ |
D | MIMX8MN6_ca53.h | 37243 …__IO uint32_t VDCTRL0_CLR; /**< LCDIF VSYNC Mode and Dotclk Mode Control Reg… member
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D | MIMX8MN6_cm7.h | 37229 …__IO uint32_t VDCTRL0_CLR; /**< LCDIF VSYNC Mode and Dotclk Mode Control Reg… member
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1062/ |
D | MIMXRT1062.h | 29617 …__IO uint32_t VDCTRL0_CLR; /**< LCDIF VSYNC Mode and Dotclk Mode Control Reg… member
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MQ5/ |
D | MIMX8MQ5_cm4.h | 36063 …__IO uint32_t VDCTRL0_CLR; /**< LCDIF VSYNC Mode and Dotclk Mode Control Reg… member
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1064/ |
D | MIMXRT1064.h | 29612 …__IO uint32_t VDCTRL0_CLR; /**< LCDIF VSYNC Mode and Dotclk Mode Control Reg… member
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MD6/ |
D | MIMX8MD6_cm4.h | 36063 …__IO uint32_t VDCTRL0_CLR; /**< LCDIF VSYNC Mode and Dotclk Mode Control Reg… member
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MD7/ |
D | MIMX8MD7_cm4.h | 36063 …__IO uint32_t VDCTRL0_CLR; /**< LCDIF VSYNC Mode and Dotclk Mode Control Reg… member
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MQ7/ |
D | MIMX8MQ7_cm4.h | 36063 …__IO uint32_t VDCTRL0_CLR; /**< LCDIF VSYNC Mode and Dotclk Mode Control Reg… member
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MQ6/ |
D | MIMX8MQ6_cm4.h | 36063 …__IO uint32_t VDCTRL0_CLR; /**< LCDIF VSYNC Mode and Dotclk Mode Control Reg… member
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MM6/ |
D | MIMX8MM6_ca53.h | 37941 …__IO uint32_t VDCTRL0_CLR; /**< LCDIF VSYNC Mode and Dotclk Mode Control Reg… member
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D | MIMX8MM6_cm4.h | 37932 …__IO uint32_t VDCTRL0_CLR; /**< LCDIF VSYNC Mode and Dotclk Mode Control Reg… member
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MM5/ |
D | MIMX8MM5_cm4.h | 37932 …__IO uint32_t VDCTRL0_CLR; /**< LCDIF VSYNC Mode and Dotclk Mode Control Reg… member
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1166/ |
D | MIMXRT1166_cm4.h | 55860 …__IO uint32_t VDCTRL0_CLR; /**< LCDIF VSYNC Mode and Dotclk Mode Control Reg… member
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MM1/ |
D | MIMX8MM1_cm4.h | 37932 …__IO uint32_t VDCTRL0_CLR; /**< LCDIF VSYNC Mode and Dotclk Mode Control Reg… member
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