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Searched refs:USBPHY_CTRL_CLKGATE_MASK (Results 1 – 25 of 96) sorted by relevance

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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1051/drivers/
Dfsl_clock.c548 USBPHY1->CTRL &= ~USBPHY_CTRL_CLKGATE_MASK; in CLOCK_EnableUsbhs0PhyPllClock()
563 USBPHY1->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs0PhyPllClock()
1337 USBPHY2->CTRL &= ~USBPHY_CTRL_CLKGATE_MASK; in CLOCK_EnableUsbhs1PhyPllClock()
1353 USBPHY2->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs1PhyPllClock()
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1052/drivers/
Dfsl_clock.c552 USBPHY1->CTRL &= ~USBPHY_CTRL_CLKGATE_MASK; in CLOCK_EnableUsbhs0PhyPllClock()
567 USBPHY1->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs0PhyPllClock()
1341 USBPHY2->CTRL &= ~USBPHY_CTRL_CLKGATE_MASK; in CLOCK_EnableUsbhs1PhyPllClock()
1357 USBPHY2->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs1PhyPllClock()
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1061/drivers/
Dfsl_clock.c556 USBPHY1->CTRL &= ~USBPHY_CTRL_CLKGATE_MASK; in CLOCK_EnableUsbhs0PhyPllClock()
571 USBPHY1->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs0PhyPllClock()
1358 USBPHY2->CTRL &= ~USBPHY_CTRL_CLKGATE_MASK; in CLOCK_EnableUsbhs1PhyPllClock()
1374 USBPHY2->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs1PhyPllClock()
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1062/drivers/
Dfsl_clock.c556 USBPHY1->CTRL &= ~USBPHY_CTRL_CLKGATE_MASK; in CLOCK_EnableUsbhs0PhyPllClock()
571 USBPHY1->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs0PhyPllClock()
1358 USBPHY2->CTRL &= ~USBPHY_CTRL_CLKGATE_MASK; in CLOCK_EnableUsbhs1PhyPllClock()
1374 USBPHY2->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs1PhyPllClock()
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1064/drivers/
Dfsl_clock.c556 USBPHY1->CTRL &= ~USBPHY_CTRL_CLKGATE_MASK; in CLOCK_EnableUsbhs0PhyPllClock()
571 USBPHY1->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs0PhyPllClock()
1358 USBPHY2->CTRL &= ~USBPHY_CTRL_CLKGATE_MASK; in CLOCK_EnableUsbhs1PhyPllClock()
1374 USBPHY2->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs1PhyPllClock()
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1024/drivers/
Dfsl_clock.c516 USBPHY->CTRL &= ~USBPHY_CTRL_CLKGATE_MASK; in CLOCK_EnableUsbhs0PhyPllClock()
531 USBPHY->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs0PhyPllClock()
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1021/drivers/
Dfsl_clock.c516 USBPHY->CTRL &= ~USBPHY_CTRL_CLKGATE_MASK; in CLOCK_EnableUsbhs0PhyPllClock()
531 USBPHY->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs0PhyPllClock()
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1011/drivers/
Dfsl_clock.c549 USBPHY->CTRL &= ~USBPHY_CTRL_CLKGATE_MASK; in CLOCK_EnableUsbhs0PhyPllClock()
564 USBPHY->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs0PhyPllClock()
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1015/drivers/
Dfsl_clock.c510 USBPHY->CTRL &= ~USBPHY_CTRL_CLKGATE_MASK; in CLOCK_EnableUsbhs0PhyPllClock()
525 USBPHY->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs0PhyPllClock()
/hal_nxp-3.6.0/mcux/middleware/mcux-sdk-middleware-usb/phy/
Dusb_phy.c210 usbPhyBase->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* set to 1U to gate clocks */ in USB_EhciPhyDeinit()
/hal_nxp-3.6.0/mcux/mcux-sdk/boards/frdmk66f/project_template/
Dclock_config.c173 USBPHY->CTRL &= ~USBPHY_CTRL_CLKGATE_MASK; /* Clear to 0U to run clocks */ in CLOCK_CONFIG_EnableUsbhs0PhyPllClock()
/hal_nxp-3.6.0/mcux/mcux-sdk/boards/frdmk28fa/project_template/
Dclock_config.c172 USBPHY->CTRL &= ~USBPHY_CTRL_CLKGATE_MASK; /* Clear to 0U to run clocks */ in CLOCK_CONFIG_EnableUsbhs0PhyPllClock()
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1041/drivers/
Dfsl_clock.c523 USBPHY->CTRL &= ~USBPHY_CTRL_CLKGATE_MASK; in CLOCK_EnableUsbhs0PhyPllClock()
538 USBPHY->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs0PhyPllClock()
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1042/drivers/
Dfsl_clock.c523 USBPHY->CTRL &= ~USBPHY_CTRL_CLKGATE_MASK; in CLOCK_EnableUsbhs0PhyPllClock()
538 USBPHY->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs0PhyPllClock()
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK26F18/drivers/
Dfsl_clock.c748 USBPHY->CTRL &= ~USBPHY_CTRL_CLKGATE_MASK; /* Clear to 0U to run clocks */ in CLOCK_EnableUsbhs0PhyPllClock()
764 USBPHY->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs0PhyPllClock()
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK27FA15/drivers/
Dfsl_clock.c729 USBPHY->CTRL &= ~USBPHY_CTRL_CLKGATE_MASK; /* Clear to 0U to run clocks */ in CLOCK_EnableUsbhs0PhyPllClock()
741 USBPHY->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs0PhyPllClock()
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK28FA15/drivers/
Dfsl_clock.c729 USBPHY->CTRL &= ~USBPHY_CTRL_CLKGATE_MASK; /* Clear to 0U to run clocks */ in CLOCK_EnableUsbhs0PhyPllClock()
741 USBPHY->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs0PhyPllClock()
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK65F18/drivers/
Dfsl_clock.c748 USBPHY->CTRL &= ~USBPHY_CTRL_CLKGATE_MASK; /* Clear to 0U to run clocks */ in CLOCK_EnableUsbhs0PhyPllClock()
764 USBPHY->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs0PhyPllClock()
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK66F18/drivers/
Dfsl_clock.c747 USBPHY->CTRL &= ~USBPHY_CTRL_CLKGATE_MASK; /* Clear to 0U to run clocks */ in CLOCK_EnableUsbhs0PhyPllClock()
763 USBPHY->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs0PhyPllClock()
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1173/drivers/
Dfsl_clock.c1773 USBPHY1->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs0PhyPllClock()
1867 USBPHY2->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs1PhyPllClock()
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1172/drivers/
Dfsl_clock.c1773 USBPHY1->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs0PhyPllClock()
1867 USBPHY2->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs1PhyPllClock()
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1171/drivers/
Dfsl_clock.c1773 USBPHY1->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs0PhyPllClock()
1867 USBPHY2->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs1PhyPllClock()
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1165/drivers/
Dfsl_clock.c1760 USBPHY1->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs0PhyPllClock()
1854 USBPHY2->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs1PhyPllClock()
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1175/drivers/
Dfsl_clock.c1773 USBPHY1->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs0PhyPllClock()
1867 USBPHY2->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs1PhyPllClock()
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1166/drivers/
Dfsl_clock.c1760 USBPHY1->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs0PhyPllClock()
1854 USBPHY2->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs1PhyPllClock()

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