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Searched refs:SYSCON_PRESETCTRL_FC5_RST_MASK (Results 1 – 19 of 19) sorted by relevance

/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC51U68/
DLPC51U68.h8018 #define SYSCON_PRESETCTRL_FC5_RST_MASK (0x10000U) macro
8022 …(((uint32_t)(((uint32_t)(x)) << SYSCON_PRESETCTRL_FC5_RST_SHIFT)) & SYSCON_PRESETCTRL_FC5_RST_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54114/
DLPC54114_cm4.h8640 #define SYSCON_PRESETCTRL_FC5_RST_MASK (0x10000U) macro
8644 …(((uint32_t)(((uint32_t)(x)) << SYSCON_PRESETCTRL_FC5_RST_SHIFT)) & SYSCON_PRESETCTRL_FC5_RST_MASK)
DLPC54114_cm0plus.h8627 #define SYSCON_PRESETCTRL_FC5_RST_MASK (0x10000U) macro
8631 …(((uint32_t)(((uint32_t)(x)) << SYSCON_PRESETCTRL_FC5_RST_SHIFT)) & SYSCON_PRESETCTRL_FC5_RST_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54113/
DLPC54113.h8641 #define SYSCON_PRESETCTRL_FC5_RST_MASK (0x10000U) macro
8645 …(((uint32_t)(((uint32_t)(x)) << SYSCON_PRESETCTRL_FC5_RST_SHIFT)) & SYSCON_PRESETCTRL_FC5_RST_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54607/
DLPC54607.h13060 #define SYSCON_PRESETCTRL_FC5_RST_MASK (0x10000U) macro
13064 …(((uint32_t)(((uint32_t)(x)) << SYSCON_PRESETCTRL_FC5_RST_SHIFT)) & SYSCON_PRESETCTRL_FC5_RST_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54S005/
DLPC54S005.h13044 #define SYSCON_PRESETCTRL_FC5_RST_MASK (0x10000U) macro
13048 …(((uint32_t)(((uint32_t)(x)) << SYSCON_PRESETCTRL_FC5_RST_SHIFT)) & SYSCON_PRESETCTRL_FC5_RST_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54005/
DLPC54005.h12252 #define SYSCON_PRESETCTRL_FC5_RST_MASK (0x10000U) macro
12256 …(((uint32_t)(((uint32_t)(x)) << SYSCON_PRESETCTRL_FC5_RST_SHIFT)) & SYSCON_PRESETCTRL_FC5_RST_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54605/
DLPC54605.h12416 #define SYSCON_PRESETCTRL_FC5_RST_MASK (0x10000U) macro
12420 …(((uint32_t)(((uint32_t)(x)) << SYSCON_PRESETCTRL_FC5_RST_SHIFT)) & SYSCON_PRESETCTRL_FC5_RST_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54616/
DLPC54616.h16639 #define SYSCON_PRESETCTRL_FC5_RST_MASK (0x10000U) macro
16643 …(((uint32_t)(((uint32_t)(x)) << SYSCON_PRESETCTRL_FC5_RST_SHIFT)) & SYSCON_PRESETCTRL_FC5_RST_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54016/
DLPC54016.h15546 #define SYSCON_PRESETCTRL_FC5_RST_MASK (0x10000U) macro
15549 …(((uint32_t)(((uint32_t)(x)) << SYSCON_PRESETCTRL_FC5_RST_SHIFT)) & SYSCON_PRESETCTRL_FC5_RST_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54606/
DLPC54606.h16564 #define SYSCON_PRESETCTRL_FC5_RST_MASK (0x10000U) macro
16568 …(((uint32_t)(((uint32_t)(x)) << SYSCON_PRESETCTRL_FC5_RST_SHIFT)) & SYSCON_PRESETCTRL_FC5_RST_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54628/
DLPC54628.h17449 #define SYSCON_PRESETCTRL_FC5_RST_MASK (0x10000U) macro
17453 …(((uint32_t)(((uint32_t)(x)) << SYSCON_PRESETCTRL_FC5_RST_SHIFT)) & SYSCON_PRESETCTRL_FC5_RST_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54618/
DLPC54618.h17284 #define SYSCON_PRESETCTRL_FC5_RST_MASK (0x10000U) macro
17288 …(((uint32_t)(((uint32_t)(x)) << SYSCON_PRESETCTRL_FC5_RST_SHIFT)) & SYSCON_PRESETCTRL_FC5_RST_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54S016/
DLPC54S016.h16252 #define SYSCON_PRESETCTRL_FC5_RST_MASK (0x10000U) macro
16255 …(((uint32_t)(((uint32_t)(x)) << SYSCON_PRESETCTRL_FC5_RST_SHIFT)) & SYSCON_PRESETCTRL_FC5_RST_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54608/
DLPC54608.h17207 #define SYSCON_PRESETCTRL_FC5_RST_MASK (0x10000U) macro
17211 …(((uint32_t)(((uint32_t)(x)) << SYSCON_PRESETCTRL_FC5_RST_SHIFT)) & SYSCON_PRESETCTRL_FC5_RST_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54S018M/
DLPC54S018M.h17937 #define SYSCON_PRESETCTRL_FC5_RST_MASK (0x10000U) macro
17941 …(((uint32_t)(((uint32_t)(x)) << SYSCON_PRESETCTRL_FC5_RST_SHIFT)) & SYSCON_PRESETCTRL_FC5_RST_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54S018/
DLPC54S018.h17937 #define SYSCON_PRESETCTRL_FC5_RST_MASK (0x10000U) macro
17941 …(((uint32_t)(((uint32_t)(x)) << SYSCON_PRESETCTRL_FC5_RST_SHIFT)) & SYSCON_PRESETCTRL_FC5_RST_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54018/
DLPC54018.h17145 #define SYSCON_PRESETCTRL_FC5_RST_MASK (0x10000U) macro
17149 …(((uint32_t)(((uint32_t)(x)) << SYSCON_PRESETCTRL_FC5_RST_SHIFT)) & SYSCON_PRESETCTRL_FC5_RST_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54018M/
DLPC54018M.h17145 #define SYSCON_PRESETCTRL_FC5_RST_MASK (0x10000U) macro
17149 …(((uint32_t)(((uint32_t)(x)) << SYSCON_PRESETCTRL_FC5_RST_SHIFT)) & SYSCON_PRESETCTRL_FC5_RST_MASK)