/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54114/ |
D | LPC54114_cm4.h | 10241 #define SYSCON_AUTOCGOR_RAM1_MASK (0x4U) macro 10245 … (((uint32_t)(((uint32_t)(x)) << SYSCON_AUTOCGOR_RAM1_SHIFT)) & SYSCON_AUTOCGOR_RAM1_MASK)
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D | LPC54114_cm0plus.h | 10228 #define SYSCON_AUTOCGOR_RAM1_MASK (0x4U) macro 10232 … (((uint32_t)(((uint32_t)(x)) << SYSCON_AUTOCGOR_RAM1_SHIFT)) & SYSCON_AUTOCGOR_RAM1_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54113/ |
D | LPC54113.h | 10242 #define SYSCON_AUTOCGOR_RAM1_MASK (0x4U) macro 10246 … (((uint32_t)(((uint32_t)(x)) << SYSCON_AUTOCGOR_RAM1_SHIFT)) & SYSCON_AUTOCGOR_RAM1_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54607/ |
D | LPC54607.h | 16162 #define SYSCON_AUTOCGOR_RAM1_MASK (0x4U) macro 16166 … (((uint32_t)(((uint32_t)(x)) << SYSCON_AUTOCGOR_RAM1_SHIFT)) & SYSCON_AUTOCGOR_RAM1_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54S005/ |
D | LPC54S005.h | 15989 #define SYSCON_AUTOCGOR_RAM1_MASK (0x4U) macro 15993 … (((uint32_t)(((uint32_t)(x)) << SYSCON_AUTOCGOR_RAM1_SHIFT)) & SYSCON_AUTOCGOR_RAM1_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54005/ |
D | LPC54005.h | 15197 #define SYSCON_AUTOCGOR_RAM1_MASK (0x4U) macro 15201 … (((uint32_t)(((uint32_t)(x)) << SYSCON_AUTOCGOR_RAM1_SHIFT)) & SYSCON_AUTOCGOR_RAM1_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54605/ |
D | LPC54605.h | 15518 #define SYSCON_AUTOCGOR_RAM1_MASK (0x4U) macro 15522 … (((uint32_t)(((uint32_t)(x)) << SYSCON_AUTOCGOR_RAM1_SHIFT)) & SYSCON_AUTOCGOR_RAM1_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54616/ |
D | LPC54616.h | 19741 #define SYSCON_AUTOCGOR_RAM1_MASK (0x4U) macro 19745 … (((uint32_t)(((uint32_t)(x)) << SYSCON_AUTOCGOR_RAM1_SHIFT)) & SYSCON_AUTOCGOR_RAM1_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54016/ |
D | LPC54016.h | 18141 #define SYSCON_AUTOCGOR_RAM1_MASK (0x4U) macro 18144 … (((uint32_t)(((uint32_t)(x)) << SYSCON_AUTOCGOR_RAM1_SHIFT)) & SYSCON_AUTOCGOR_RAM1_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54606/ |
D | LPC54606.h | 19666 #define SYSCON_AUTOCGOR_RAM1_MASK (0x4U) macro 19670 … (((uint32_t)(((uint32_t)(x)) << SYSCON_AUTOCGOR_RAM1_SHIFT)) & SYSCON_AUTOCGOR_RAM1_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54628/ |
D | LPC54628.h | 20587 #define SYSCON_AUTOCGOR_RAM1_MASK (0x4U) macro 20591 … (((uint32_t)(((uint32_t)(x)) << SYSCON_AUTOCGOR_RAM1_SHIFT)) & SYSCON_AUTOCGOR_RAM1_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54618/ |
D | LPC54618.h | 20386 #define SYSCON_AUTOCGOR_RAM1_MASK (0x4U) macro 20390 … (((uint32_t)(((uint32_t)(x)) << SYSCON_AUTOCGOR_RAM1_SHIFT)) & SYSCON_AUTOCGOR_RAM1_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54S016/ |
D | LPC54S016.h | 18847 #define SYSCON_AUTOCGOR_RAM1_MASK (0x4U) macro 18850 … (((uint32_t)(((uint32_t)(x)) << SYSCON_AUTOCGOR_RAM1_SHIFT)) & SYSCON_AUTOCGOR_RAM1_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54608/ |
D | LPC54608.h | 20309 #define SYSCON_AUTOCGOR_RAM1_MASK (0x4U) macro 20313 … (((uint32_t)(((uint32_t)(x)) << SYSCON_AUTOCGOR_RAM1_SHIFT)) & SYSCON_AUTOCGOR_RAM1_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54S018M/ |
D | LPC54S018M.h | 20882 #define SYSCON_AUTOCGOR_RAM1_MASK (0x4U) macro 20886 … (((uint32_t)(((uint32_t)(x)) << SYSCON_AUTOCGOR_RAM1_SHIFT)) & SYSCON_AUTOCGOR_RAM1_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54S018/ |
D | LPC54S018.h | 20882 #define SYSCON_AUTOCGOR_RAM1_MASK (0x4U) macro 20886 … (((uint32_t)(((uint32_t)(x)) << SYSCON_AUTOCGOR_RAM1_SHIFT)) & SYSCON_AUTOCGOR_RAM1_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54018/ |
D | LPC54018.h | 20090 #define SYSCON_AUTOCGOR_RAM1_MASK (0x4U) macro 20094 … (((uint32_t)(((uint32_t)(x)) << SYSCON_AUTOCGOR_RAM1_SHIFT)) & SYSCON_AUTOCGOR_RAM1_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54018M/ |
D | LPC54018M.h | 20090 #define SYSCON_AUTOCGOR_RAM1_MASK (0x4U) macro 20094 … (((uint32_t)(((uint32_t)(x)) << SYSCON_AUTOCGOR_RAM1_SHIFT)) & SYSCON_AUTOCGOR_RAM1_MASK)
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