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Searched refs:SYSCON_AHBCLKCTRL_SRAM1_MASK (Results 1 – 25 of 33) sorted by relevance

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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54616/
Dsystem_LPC54616.c278 …SYSCON->AHBCLKCTRLSET[0] = SYSCON_AHBCLKCTRL_SRAM1_MASK | SYSCON_AHBCLKCTRL_SRAM2_MASK | SYSCON_AH… in SystemInit()
DLPC54616.h16882 #define SYSCON_AHBCLKCTRL_SRAM1_MASK (0x8U) macro
16886 … (((uint32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL_SRAM1_SHIFT)) & SYSCON_AHBCLKCTRL_SRAM1_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54618/
Dsystem_LPC54618.c276 …SYSCON->AHBCLKCTRLSET[0] = SYSCON_AHBCLKCTRL_SRAM1_MASK | SYSCON_AHBCLKCTRL_SRAM2_MASK | SYSCON_AH… in SystemInit()
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54S005/
Dsystem_LPC54S005.c270 SYSCON_AHBCLKCTRL_SRAM1_MASK | SYSCON_AHBCLKCTRL_SRAM2_MASK | SYSCON_AHBCLKCTRL_SRAM3_MASK; in SystemInit()
DLPC54S005.h13293 #define SYSCON_AHBCLKCTRL_SRAM1_MASK (0x8U) macro
13297 … (((uint32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL_SRAM1_SHIFT)) & SYSCON_AHBCLKCTRL_SRAM1_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54607/
Dsystem_LPC54607.c277 …SYSCON->AHBCLKCTRLSET[0] = SYSCON_AHBCLKCTRL_SRAM1_MASK | SYSCON_AHBCLKCTRL_SRAM2_MASK | SYSCON_AH… in SystemInit()
DLPC54607.h13303 #define SYSCON_AHBCLKCTRL_SRAM1_MASK (0x8U) macro
13307 … (((uint32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL_SRAM1_SHIFT)) & SYSCON_AHBCLKCTRL_SRAM1_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54608/
Dsystem_LPC54608.c276 …SYSCON->AHBCLKCTRLSET[0] = SYSCON_AHBCLKCTRL_SRAM1_MASK | SYSCON_AHBCLKCTRL_SRAM2_MASK | SYSCON_AH… in SystemInit()
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54606/
Dsystem_LPC54606.c280 …SYSCON->AHBCLKCTRLSET[0] = SYSCON_AHBCLKCTRL_SRAM1_MASK | SYSCON_AHBCLKCTRL_SRAM2_MASK | SYSCON_AH… in SystemInit()
DLPC54606.h16807 #define SYSCON_AHBCLKCTRL_SRAM1_MASK (0x8U) macro
16811 … (((uint32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL_SRAM1_SHIFT)) & SYSCON_AHBCLKCTRL_SRAM1_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54628/
Dsystem_LPC54628.c274 …SYSCON->AHBCLKCTRLSET[0] = SYSCON_AHBCLKCTRL_SRAM1_MASK | SYSCON_AHBCLKCTRL_SRAM2_MASK | SYSCON_AH… in SystemInit()
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54S018M/
Dsystem_LPC54S018M.c270 SYSCON_AHBCLKCTRL_SRAM1_MASK | SYSCON_AHBCLKCTRL_SRAM2_MASK | SYSCON_AHBCLKCTRL_SRAM3_MASK; in SystemInit()
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54S018/
Dsystem_LPC54S018.c270 SYSCON_AHBCLKCTRL_SRAM1_MASK | SYSCON_AHBCLKCTRL_SRAM2_MASK | SYSCON_AHBCLKCTRL_SRAM3_MASK; in SystemInit()
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54S016/
Dsystem_LPC54S016.c271 …SYSCON->AHBCLKCTRLSET[0] = SYSCON_AHBCLKCTRL_SRAM1_MASK | SYSCON_AHBCLKCTRL_SRAM2_MASK | SYSCON_AH… in SystemInit()
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54016/
Dsystem_LPC54016.c278 …SYSCON->AHBCLKCTRLSET[0] = SYSCON_AHBCLKCTRL_SRAM1_MASK | SYSCON_AHBCLKCTRL_SRAM2_MASK | SYSCON_AH… in SystemInit()
DLPC54016.h15767 #define SYSCON_AHBCLKCTRL_SRAM1_MASK (0x8U) macro
15770 … (((uint32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL_SRAM1_SHIFT)) & SYSCON_AHBCLKCTRL_SRAM1_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54605/
Dsystem_LPC54605.c280 …SYSCON->AHBCLKCTRLSET[0] = SYSCON_AHBCLKCTRL_SRAM1_MASK | SYSCON_AHBCLKCTRL_SRAM2_MASK | SYSCON_AH… in SystemInit()
DLPC54605.h12659 #define SYSCON_AHBCLKCTRL_SRAM1_MASK (0x8U) macro
12663 … (((uint32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL_SRAM1_SHIFT)) & SYSCON_AHBCLKCTRL_SRAM1_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54005/
Dsystem_LPC54005.c277 SYSCON_AHBCLKCTRL_SRAM1_MASK | SYSCON_AHBCLKCTRL_SRAM2_MASK | SYSCON_AHBCLKCTRL_SRAM3_MASK; in SystemInit()
DLPC54005.h12501 #define SYSCON_AHBCLKCTRL_SRAM1_MASK (0x8U) macro
12505 … (((uint32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL_SRAM1_SHIFT)) & SYSCON_AHBCLKCTRL_SRAM1_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54018/
Dsystem_LPC54018.c277 SYSCON_AHBCLKCTRL_SRAM1_MASK | SYSCON_AHBCLKCTRL_SRAM2_MASK | SYSCON_AHBCLKCTRL_SRAM3_MASK; in SystemInit()
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54018M/
Dsystem_LPC54018M.c277 SYSCON_AHBCLKCTRL_SRAM1_MASK | SYSCON_AHBCLKCTRL_SRAM2_MASK | SYSCON_AHBCLKCTRL_SRAM3_MASK; in SystemInit()
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54114/
DLPC54114_cm4.h8799 #define SYSCON_AHBCLKCTRL_SRAM1_MASK (0x8U) macro
8803 … (((uint32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL_SRAM1_SHIFT)) & SYSCON_AHBCLKCTRL_SRAM1_MASK)
DLPC54114_cm0plus.h8786 #define SYSCON_AHBCLKCTRL_SRAM1_MASK (0x8U) macro
8790 … (((uint32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL_SRAM1_SHIFT)) & SYSCON_AHBCLKCTRL_SRAM1_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54113/
DLPC54113.h8800 #define SYSCON_AHBCLKCTRL_SRAM1_MASK (0x8U) macro
8804 … (((uint32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL_SRAM1_SHIFT)) & SYSCON_AHBCLKCTRL_SRAM1_MASK)

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