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Searched refs:SYSCON_AHBCLKCTRL_SCT0_MASK (Results 1 – 19 of 19) sorted by relevance

/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC51U68/
DLPC51U68.h8162 #define SYSCON_AHBCLKCTRL_SCT0_MASK (0x4U) macro
8166 … (((uint32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL_SCT0_SHIFT)) & SYSCON_AHBCLKCTRL_SCT0_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54114/
DLPC54114_cm4.h8794 #define SYSCON_AHBCLKCTRL_SCT0_MASK (0x4U) macro
8798 … (((uint32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL_SCT0_SHIFT)) & SYSCON_AHBCLKCTRL_SCT0_MASK)
DLPC54114_cm0plus.h8781 #define SYSCON_AHBCLKCTRL_SCT0_MASK (0x4U) macro
8785 … (((uint32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL_SCT0_SHIFT)) & SYSCON_AHBCLKCTRL_SCT0_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54113/
DLPC54113.h8795 #define SYSCON_AHBCLKCTRL_SCT0_MASK (0x4U) macro
8799 … (((uint32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL_SCT0_SHIFT)) & SYSCON_AHBCLKCTRL_SCT0_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54607/
DLPC54607.h13291 #define SYSCON_AHBCLKCTRL_SCT0_MASK (0x4U) macro
13295 … (((uint32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL_SCT0_SHIFT)) & SYSCON_AHBCLKCTRL_SCT0_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54S005/
DLPC54S005.h13281 #define SYSCON_AHBCLKCTRL_SCT0_MASK (0x4U) macro
13285 … (((uint32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL_SCT0_SHIFT)) & SYSCON_AHBCLKCTRL_SCT0_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54005/
DLPC54005.h12489 #define SYSCON_AHBCLKCTRL_SCT0_MASK (0x4U) macro
12493 … (((uint32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL_SCT0_SHIFT)) & SYSCON_AHBCLKCTRL_SCT0_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54605/
DLPC54605.h12647 #define SYSCON_AHBCLKCTRL_SCT0_MASK (0x4U) macro
12651 … (((uint32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL_SCT0_SHIFT)) & SYSCON_AHBCLKCTRL_SCT0_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54616/
DLPC54616.h16870 #define SYSCON_AHBCLKCTRL_SCT0_MASK (0x4U) macro
16874 … (((uint32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL_SCT0_SHIFT)) & SYSCON_AHBCLKCTRL_SCT0_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54016/
DLPC54016.h15757 #define SYSCON_AHBCLKCTRL_SCT0_MASK (0x4U) macro
15760 … (((uint32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL_SCT0_SHIFT)) & SYSCON_AHBCLKCTRL_SCT0_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54606/
DLPC54606.h16795 #define SYSCON_AHBCLKCTRL_SCT0_MASK (0x4U) macro
16799 … (((uint32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL_SCT0_SHIFT)) & SYSCON_AHBCLKCTRL_SCT0_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54628/
DLPC54628.h17831 #define SYSCON_AHBCLKCTRL_SCT0_MASK (0x4U) macro
17835 … (((uint32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL_SCT0_SHIFT)) & SYSCON_AHBCLKCTRL_SCT0_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54618/
DLPC54618.h17515 #define SYSCON_AHBCLKCTRL_SCT0_MASK (0x4U) macro
17519 … (((uint32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL_SCT0_SHIFT)) & SYSCON_AHBCLKCTRL_SCT0_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54S016/
DLPC54S016.h16463 #define SYSCON_AHBCLKCTRL_SCT0_MASK (0x4U) macro
16466 … (((uint32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL_SCT0_SHIFT)) & SYSCON_AHBCLKCTRL_SCT0_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54608/
DLPC54608.h17438 #define SYSCON_AHBCLKCTRL_SCT0_MASK (0x4U) macro
17442 … (((uint32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL_SCT0_SHIFT)) & SYSCON_AHBCLKCTRL_SCT0_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54S018M/
DLPC54S018M.h18174 #define SYSCON_AHBCLKCTRL_SCT0_MASK (0x4U) macro
18178 … (((uint32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL_SCT0_SHIFT)) & SYSCON_AHBCLKCTRL_SCT0_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54S018/
DLPC54S018.h18174 #define SYSCON_AHBCLKCTRL_SCT0_MASK (0x4U) macro
18178 … (((uint32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL_SCT0_SHIFT)) & SYSCON_AHBCLKCTRL_SCT0_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54018/
DLPC54018.h17382 #define SYSCON_AHBCLKCTRL_SCT0_MASK (0x4U) macro
17386 … (((uint32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL_SCT0_SHIFT)) & SYSCON_AHBCLKCTRL_SCT0_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54018M/
DLPC54018M.h17382 #define SYSCON_AHBCLKCTRL_SCT0_MASK (0x4U) macro
17386 … (((uint32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL_SCT0_SHIFT)) & SYSCON_AHBCLKCTRL_SCT0_MASK)