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Searched refs:SEMC_BR_MS_MASK (Results 1 – 21 of 21) sorted by relevance

/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1024/
DMIMXRT1024.h34178 #define SEMC_BR_MS_MASK (0x3EU) macro
34203 …x) (((uint32_t)(((uint32_t)(x)) << SEMC_BR_MS_SHIFT)) & SEMC_BR_MS_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1021/
DMIMXRT1021.h34195 #define SEMC_BR_MS_MASK (0x3EU) macro
34220 …x) (((uint32_t)(((uint32_t)(x)) << SEMC_BR_MS_SHIFT)) & SEMC_BR_MS_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1051/
DMIMXRT1051.h35760 #define SEMC_BR_MS_MASK (0x3EU) macro
35785 …x) (((uint32_t)(((uint32_t)(x)) << SEMC_BR_MS_SHIFT)) & SEMC_BR_MS_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1041/
DMIMXRT1041.h37171 #define SEMC_BR_MS_MASK (0x3EU) macro
37196 …x) (((uint32_t)(((uint32_t)(x)) << SEMC_BR_MS_SHIFT)) & SEMC_BR_MS_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1042/
DMIMXRT1042.h40581 #define SEMC_BR_MS_MASK (0x3EU) macro
40606 …x) (((uint32_t)(((uint32_t)(x)) << SEMC_BR_MS_SHIFT)) & SEMC_BR_MS_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1052/
DMIMXRT1052.h40026 #define SEMC_BR_MS_MASK (0x3EU) macro
40051 …x) (((uint32_t)(((uint32_t)(x)) << SEMC_BR_MS_SHIFT)) & SEMC_BR_MS_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1061/
DMIMXRT1061.h38058 #define SEMC_BR_MS_MASK (0x3EU) macro
38083 …x) (((uint32_t)(((uint32_t)(x)) << SEMC_BR_MS_SHIFT)) & SEMC_BR_MS_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1062/
DMIMXRT1062.h42252 #define SEMC_BR_MS_MASK (0x3EU) macro
42277 …x) (((uint32_t)(((uint32_t)(x)) << SEMC_BR_MS_SHIFT)) & SEMC_BR_MS_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1064/
DMIMXRT1064.h42246 #define SEMC_BR_MS_MASK (0x3EU) macro
42271 …x) (((uint32_t)(((uint32_t)(x)) << SEMC_BR_MS_SHIFT)) & SEMC_BR_MS_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1165/
DMIMXRT1165_cm7.h67158 #define SEMC_BR_MS_MASK (0x3EU) macro
67183 …x) (((uint32_t)(((uint32_t)(x)) << SEMC_BR_MS_SHIFT)) & SEMC_BR_MS_MASK)
DMIMXRT1165_cm4.h68091 #define SEMC_BR_MS_MASK (0x3EU) macro
68116 …x) (((uint32_t)(((uint32_t)(x)) << SEMC_BR_MS_SHIFT)) & SEMC_BR_MS_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1175/
DMIMXRT1175_cm7.h78342 #define SEMC_BR_MS_MASK (0x3EU) macro
78367 …x) (((uint32_t)(((uint32_t)(x)) << SEMC_BR_MS_SHIFT)) & SEMC_BR_MS_MASK)
DMIMXRT1175_cm4.h79275 #define SEMC_BR_MS_MASK (0x3EU) macro
79300 …x) (((uint32_t)(((uint32_t)(x)) << SEMC_BR_MS_SHIFT)) & SEMC_BR_MS_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1166/
DMIMXRT1166_cm4.h73556 #define SEMC_BR_MS_MASK (0x3EU) macro
73581 …x) (((uint32_t)(((uint32_t)(x)) << SEMC_BR_MS_SHIFT)) & SEMC_BR_MS_MASK)
DMIMXRT1166_cm7.h72623 #define SEMC_BR_MS_MASK (0x3EU) macro
72648 …x) (((uint32_t)(((uint32_t)(x)) << SEMC_BR_MS_SHIFT)) & SEMC_BR_MS_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1171/
DMIMXRT1171.h78342 #define SEMC_BR_MS_MASK (0x3EU) macro
78367 …x) (((uint32_t)(((uint32_t)(x)) << SEMC_BR_MS_SHIFT)) & SEMC_BR_MS_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1173/
DMIMXRT1173_cm7.h83804 #define SEMC_BR_MS_MASK (0x3EU) macro
83829 …x) (((uint32_t)(((uint32_t)(x)) << SEMC_BR_MS_SHIFT)) & SEMC_BR_MS_MASK)
DMIMXRT1173_cm4.h84737 #define SEMC_BR_MS_MASK (0x3EU) macro
84762 …x) (((uint32_t)(((uint32_t)(x)) << SEMC_BR_MS_SHIFT)) & SEMC_BR_MS_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1172/
DMIMXRT1172.h83807 #define SEMC_BR_MS_MASK (0x3EU) macro
83832 …x) (((uint32_t)(((uint32_t)(x)) << SEMC_BR_MS_SHIFT)) & SEMC_BR_MS_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1176/
DMIMXRT1176_cm7.h83807 #define SEMC_BR_MS_MASK (0x3EU) macro
83832 …x) (((uint32_t)(((uint32_t)(x)) << SEMC_BR_MS_SHIFT)) & SEMC_BR_MS_MASK)
DMIMXRT1176_cm4.h84740 #define SEMC_BR_MS_MASK (0x3EU) macro
84765 …x) (((uint32_t)(((uint32_t)(x)) << SEMC_BR_MS_SHIFT)) & SEMC_BR_MS_MASK)