/hal_nxp-3.6.0/mcux/mcux-sdk/drivers/sdif/ |
D | fsl_sdif.h | 130 kSDIF_ResetDMAInterface = SDIF_CTRL_DMA_RESET_MASK, /*!< reset DMA interface */
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54607/ |
D | LPC54607.h | 9950 #define SDIF_CTRL_DMA_RESET_MASK (0x4U) macro 9954 … (((uint32_t)(((uint32_t)(x)) << SDIF_CTRL_DMA_RESET_SHIFT)) & SDIF_CTRL_DMA_RESET_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54S005/ |
D | LPC54S005.h | 9765 #define SDIF_CTRL_DMA_RESET_MASK (0x4U) macro 9769 … (((uint32_t)(((uint32_t)(x)) << SDIF_CTRL_DMA_RESET_SHIFT)) & SDIF_CTRL_DMA_RESET_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54005/ |
D | LPC54005.h | 8973 #define SDIF_CTRL_DMA_RESET_MASK (0x4U) macro 8977 … (((uint32_t)(((uint32_t)(x)) << SDIF_CTRL_DMA_RESET_SHIFT)) & SDIF_CTRL_DMA_RESET_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54605/ |
D | LPC54605.h | 9306 #define SDIF_CTRL_DMA_RESET_MASK (0x4U) macro 9310 … (((uint32_t)(((uint32_t)(x)) << SDIF_CTRL_DMA_RESET_SHIFT)) & SDIF_CTRL_DMA_RESET_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54616/ |
D | LPC54616.h | 13529 #define SDIF_CTRL_DMA_RESET_MASK (0x4U) macro 13533 … (((uint32_t)(((uint32_t)(x)) << SDIF_CTRL_DMA_RESET_SHIFT)) & SDIF_CTRL_DMA_RESET_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54016/ |
D | LPC54016.h | 12550 #define SDIF_CTRL_DMA_RESET_MASK (0x4U) macro 12553 … (((uint32_t)(((uint32_t)(x)) << SDIF_CTRL_DMA_RESET_SHIFT)) & SDIF_CTRL_DMA_RESET_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54606/ |
D | LPC54606.h | 13454 #define SDIF_CTRL_DMA_RESET_MASK (0x4U) macro 13458 … (((uint32_t)(((uint32_t)(x)) << SDIF_CTRL_DMA_RESET_SHIFT)) & SDIF_CTRL_DMA_RESET_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54628/ |
D | LPC54628.h | 14172 #define SDIF_CTRL_DMA_RESET_MASK (0x4U) macro 14176 … (((uint32_t)(((uint32_t)(x)) << SDIF_CTRL_DMA_RESET_SHIFT)) & SDIF_CTRL_DMA_RESET_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54618/ |
D | LPC54618.h | 14174 #define SDIF_CTRL_DMA_RESET_MASK (0x4U) macro 14178 … (((uint32_t)(((uint32_t)(x)) << SDIF_CTRL_DMA_RESET_SHIFT)) & SDIF_CTRL_DMA_RESET_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54S016/ |
D | LPC54S016.h | 13256 #define SDIF_CTRL_DMA_RESET_MASK (0x4U) macro 13259 … (((uint32_t)(((uint32_t)(x)) << SDIF_CTRL_DMA_RESET_SHIFT)) & SDIF_CTRL_DMA_RESET_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54608/ |
D | LPC54608.h | 14097 #define SDIF_CTRL_DMA_RESET_MASK (0x4U) macro 14101 … (((uint32_t)(((uint32_t)(x)) << SDIF_CTRL_DMA_RESET_SHIFT)) & SDIF_CTRL_DMA_RESET_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54S018M/ |
D | LPC54S018M.h | 14658 #define SDIF_CTRL_DMA_RESET_MASK (0x4U) macro 14662 … (((uint32_t)(((uint32_t)(x)) << SDIF_CTRL_DMA_RESET_SHIFT)) & SDIF_CTRL_DMA_RESET_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54S018/ |
D | LPC54S018.h | 14658 #define SDIF_CTRL_DMA_RESET_MASK (0x4U) macro 14662 … (((uint32_t)(((uint32_t)(x)) << SDIF_CTRL_DMA_RESET_SHIFT)) & SDIF_CTRL_DMA_RESET_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54018/ |
D | LPC54018.h | 13866 #define SDIF_CTRL_DMA_RESET_MASK (0x4U) macro 13870 … (((uint32_t)(((uint32_t)(x)) << SDIF_CTRL_DMA_RESET_SHIFT)) & SDIF_CTRL_DMA_RESET_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54018M/ |
D | LPC54018M.h | 13866 #define SDIF_CTRL_DMA_RESET_MASK (0x4U) macro 13870 … (((uint32_t)(((uint32_t)(x)) << SDIF_CTRL_DMA_RESET_SHIFT)) & SDIF_CTRL_DMA_RESET_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC5528/ |
D | LPC5528.h | 17213 #define SDIF_CTRL_DMA_RESET_MASK (0x4U) macro 17217 … (((uint32_t)(((uint32_t)(x)) << SDIF_CTRL_DMA_RESET_SHIFT)) & SDIF_CTRL_DMA_RESET_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC5526/ |
D | LPC5526.h | 17213 #define SDIF_CTRL_DMA_RESET_MASK (0x4U) macro 17217 … (((uint32_t)(((uint32_t)(x)) << SDIF_CTRL_DMA_RESET_SHIFT)) & SDIF_CTRL_DMA_RESET_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC55S26/ |
D | LPC55S26.h | 18869 #define SDIF_CTRL_DMA_RESET_MASK (0x4U) macro 18873 … (((uint32_t)(((uint32_t)(x)) << SDIF_CTRL_DMA_RESET_SHIFT)) & SDIF_CTRL_DMA_RESET_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC55S28/ |
D | LPC55S28.h | 18869 #define SDIF_CTRL_DMA_RESET_MASK (0x4U) macro 18873 … (((uint32_t)(((uint32_t)(x)) << SDIF_CTRL_DMA_RESET_SHIFT)) & SDIF_CTRL_DMA_RESET_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC55S66/ |
D | LPC55S66_cm33_core0.h | 19467 #define SDIF_CTRL_DMA_RESET_MASK (0x4U) macro 19471 … (((uint32_t)(((uint32_t)(x)) << SDIF_CTRL_DMA_RESET_SHIFT)) & SDIF_CTRL_DMA_RESET_MASK)
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D | LPC55S66_cm33_core1.h | 19467 #define SDIF_CTRL_DMA_RESET_MASK (0x4U) macro 19471 … (((uint32_t)(((uint32_t)(x)) << SDIF_CTRL_DMA_RESET_SHIFT)) & SDIF_CTRL_DMA_RESET_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC55S69/ |
D | LPC55S69_cm33_core1.h | 19467 #define SDIF_CTRL_DMA_RESET_MASK (0x4U) macro 19471 … (((uint32_t)(((uint32_t)(x)) << SDIF_CTRL_DMA_RESET_SHIFT)) & SDIF_CTRL_DMA_RESET_MASK)
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D | LPC55S69_cm33_core0.h | 19467 #define SDIF_CTRL_DMA_RESET_MASK (0x4U) macro 19471 … (((uint32_t)(((uint32_t)(x)) << SDIF_CTRL_DMA_RESET_SHIFT)) & SDIF_CTRL_DMA_RESET_MASK)
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