SCG_CSR_DIVCORE_SHIFT (reference) in projects: hal_nxp-3.6.0

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Searched refs:SCG_CSR_DIVCORE_SHIFT (Results 1 – 25 of 43) sorted by relevance

/hal_nxp-3.6.0/s32/drivers/s32k1/BaseNXP/header/
D	S32K116_SCG.h	`154 #define SCG_CSR_DIVCORE_SHIFT (16U) macro 156 …_DIVCORE(x) (((uint32_t)(((uint32_t)(x)) << SCG_CSR_DIVCORE_SHIFT)) & SCG_CS…`
D	S32K118_SCG.h	`154 #define SCG_CSR_DIVCORE_SHIFT (16U) macro 156 …_DIVCORE(x) (((uint32_t)(((uint32_t)(x)) << SCG_CSR_DIVCORE_SHIFT)) & SCG_CS…`
D	S32K142W_SCG.h	`158 #define SCG_CSR_DIVCORE_SHIFT (16U) macro 160 …_DIVCORE(x) (((uint32_t)(((uint32_t)(x)) << SCG_CSR_DIVCORE_SHIFT)) & SCG_CS…`
D	S32K144_SCG.h	`158 #define SCG_CSR_DIVCORE_SHIFT (16U) macro 160 …_DIVCORE(x) (((uint32_t)(((uint32_t)(x)) << SCG_CSR_DIVCORE_SHIFT)) & SCG_CS…`
D	S32K144W_SCG.h	`158 #define SCG_CSR_DIVCORE_SHIFT (16U) macro 160 …_DIVCORE(x) (((uint32_t)(((uint32_t)(x)) << SCG_CSR_DIVCORE_SHIFT)) & SCG_CS…`
D	S32K142_SCG.h	`158 #define SCG_CSR_DIVCORE_SHIFT (16U) macro 160 …_DIVCORE(x) (((uint32_t)(((uint32_t)(x)) << SCG_CSR_DIVCORE_SHIFT)) & SCG_CS…`
D	S32K148_SCG.h	`158 #define SCG_CSR_DIVCORE_SHIFT (16U) macro 160 …_DIVCORE(x) (((uint32_t)(((uint32_t)(x)) << SCG_CSR_DIVCORE_SHIFT)) & SCG_CS…`
D	S32K146_SCG.h	`158 #define SCG_CSR_DIVCORE_SHIFT (16U) macro 160 …_DIVCORE(x) (((uint32_t)(((uint32_t)(x)) << SCG_CSR_DIVCORE_SHIFT)) & SCG_CS…`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKE14Z4/
D	system_MKE14Z4.c	`98 Divider = (uint16_t)(((SCG->CSR & SCG_CSR_DIVCORE_MASK) >> SCG_CSR_DIVCORE_SHIFT) + 1U); in SystemCoreClockUpdate()`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKE14Z7/
D	system_MKE14Z7.c	`105 Divider = (uint16_t)(((SCG->CSR & SCG_CSR_DIVCORE_MASK) >> SCG_CSR_DIVCORE_SHIFT) + 1U); in SystemCoreClockUpdate()`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKE15Z4/
D	system_MKE15Z4.c	`98 Divider = (uint16_t)(((SCG->CSR & SCG_CSR_DIVCORE_MASK) >> SCG_CSR_DIVCORE_SHIFT) + 1U); in SystemCoreClockUpdate()`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKE13Z7/
D	system_MKE13Z7.c	`98 Divider = (uint16_t)(((SCG->CSR & SCG_CSR_DIVCORE_MASK) >> SCG_CSR_DIVCORE_SHIFT) + 1U); in SystemCoreClockUpdate()`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKE12Z7/
D	system_MKE12Z7.c	`98 Divider = (uint16_t)(((SCG->CSR & SCG_CSR_DIVCORE_MASK) >> SCG_CSR_DIVCORE_SHIFT) + 1U); in SystemCoreClockUpdate()`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKE17Z7/
D	system_MKE17Z7.c	`98 Divider = (uint16_t)(((SCG->CSR & SCG_CSR_DIVCORE_MASK) >> SCG_CSR_DIVCORE_SHIFT) + 1U); in SystemCoreClockUpdate()`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKE16Z4/
D	system_MKE16Z4.c	`96 Divider = (uint16_t)(((SCG->CSR & SCG_CSR_DIVCORE_MASK) >> SCG_CSR_DIVCORE_SHIFT) + 1U); in SystemCoreClockUpdate()`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKE15Z7/
D	system_MKE15Z7.c	`105 Divider = (uint16_t)(((SCG->CSR & SCG_CSR_DIVCORE_MASK) >> SCG_CSR_DIVCORE_SHIFT) + 1U); in SystemCoreClockUpdate()`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/K32L3A60/
D	system_K32L3A60_cm0plus.c	`104 Divider = (uint16_t)(((SCG->CSR & SCG_CSR_DIVCORE_MASK) >> SCG_CSR_DIVCORE_SHIFT) + 1U); in SystemCoreClockUpdate()`
D	system_K32L3A60_cm4.c	`111 Divider = (uint16_t)(((SCG->CSR & SCG_CSR_DIVCORE_MASK) >> SCG_CSR_DIVCORE_SHIFT) + 1U); in SystemCoreClockUpdate()`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/K32L2A31A/
D	system_K32L2A31A.c	`88 Divider = (uint16_t)(((SCG->CSR & SCG_CSR_DIVCORE_MASK) >> SCG_CSR_DIVCORE_SHIFT) + 1U); in SystemCoreClockUpdate()`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/K32L2A41A/
D	system_K32L2A41A.c	`88 Divider = (uint16_t)(((SCG->CSR & SCG_CSR_DIVCORE_MASK) >> SCG_CSR_DIVCORE_SHIFT) + 1U); in SystemCoreClockUpdate()`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKE14F16/
D	system_MKE14F16.c	`114 Divider = (uint16_t)(((SCG->CSR & SCG_CSR_DIVCORE_MASK) >> SCG_CSR_DIVCORE_SHIFT) + 1U); in SystemCoreClockUpdate()`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKE16F16/
D	system_MKE16F16.c	`114 Divider = (uint16_t)(((SCG->CSR & SCG_CSR_DIVCORE_MASK) >> SCG_CSR_DIVCORE_SHIFT) + 1U); in SystemCoreClockUpdate()`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKE18F16/
D	system_MKE18F16.c	`114 Divider = (uint16_t)(((SCG->CSR & SCG_CSR_DIVCORE_MASK) >> SCG_CSR_DIVCORE_SHIFT) + 1U); in SystemCoreClockUpdate()`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MCIMX7U3/
D	system_MCIMX7U3_cm4.c	`271 SCGOUTClock /= ((SCG0->CSR & SCG_CSR_DIVCORE_MASK) >> SCG_CSR_DIVCORE_SHIFT) + 1u; in SystemCoreClockUpdate()`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MCIMX7U5/
D	system_MCIMX7U5_cm4.c	`272 SCGOUTClock /= ((SCG0->CSR & SCG_CSR_DIVCORE_MASK) >> SCG_CSR_DIVCORE_SHIFT) + 1u; in SystemCoreClockUpdate()`

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