Searched refs:RegVal (Results 1 – 3 of 3) sorted by relevance
/hal_nxp-3.6.0/s32/drivers/s32ze/EthSwt_NETC/include/ |
D | Netc_EthSwt_Ip.h | 203 …e Netc_EthSwt_Ip_ReadTrcvRegister( uint8 SwitchIdx, uint8 TrcvIdx, uint8 RegIdx, uint16 * RegVal ); 219 …pe Netc_EthSwt_Ip_WriteTrcvRegister( uint8 SwitchIdx, uint8 TrcvIdx, uint8 RegIdx, uint16 RegVal );
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/hal_nxp-3.6.0/s32/drivers/s32ze/Eth_NETC/src/ |
D | Netc_Eth_Ip.c | 1065 uint16 RegVal = 1U; in Netc_Eth_Ip_CoalescingTxPacketsConversion() local 1070 RegVal *= 2U; in Netc_Eth_Ip_CoalescingTxPacketsConversion() 1072 if (RegVal > PacketsThreshold) in Netc_Eth_Ip_CoalescingTxPacketsConversion() 5164 uint32 RegVal; local 5173 RegVal = (Enable) ? (0x1UL) : (0x0UL); 5176 IP_NETC__ENETC0_PORT->PIPFCR = RegVal;
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/hal_nxp-3.6.0/s32/drivers/s32ze/EthSwt_NETC/src/ |
D | Netc_EthSwt_Ip.c | 3122 uint32 RegVal; local 3132 RegVal = (Enable) ? (0x1UL) : (0x0UL); 3135 Netc_EthSwt_Ip_SW0_PortxBaseAddr[SwitchPortIdx]->PIPFCR = RegVal; 6295 …pe Netc_EthSwt_Ip_ReadTrcvRegister( uint8 SwitchIdx, uint8 TrcvIdx, uint8 RegIdx, uint16 * RegVal ) argument 6329 *RegVal = (uint16)(IP_NETC__EMDIO_BASE->EMDIO_DATA & NETC_F1_EMDIO_DATA_MDIO_DATA_MASK); 6341 …ype Netc_EthSwt_Ip_WriteTrcvRegister( uint8 SwitchIdx, uint8 TrcvIdx, uint8 RegIdx, uint16 RegVal ) argument 6361 IP_NETC__EMDIO_BASE->EMDIO_DATA = RegVal;
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