Searched refs:REG_2P5 (Results 1 – 14 of 14) sorted by relevance
| /hal_nxp-3.6.0/mcux/mcux-sdk/drivers/pmu/ |
| D | fsl_pmu.h | 393 base->REG_2P5 |= PMU_REG_2P5_ENABLE_WEAK_LINREG_MASK; in PMU_2P5EnableWeakRegulator()
397 base->REG_2P5 &= ~PMU_REG_2P5_ENABLE_WEAK_LINREG_MASK; in PMU_2P5EnableWeakRegulator()
417 base->REG_2P5 = (base->REG_2P5 & ~PMU_REG_2P5_OUTPUT_TRG_MASK) | PMU_REG_2P5_OUTPUT_TRG(value); in PMU_2P5SetRegulatorOutputVoltage()
433 base->REG_2P5 = (base->REG_2P5 & ~PMU_REG_2P5_BO_OFFSET_MASK) | PMU_REG_2P5_BO_OFFSET(value); in PMU_2P5SetBrownoutOffsetVoltage()
446 base->REG_2P5 |= PMU_REG_2P5_ENABLE_PULLDOWN_MASK; in PMU_2P5EnablePullDown()
450 base->REG_2P5 &= ~PMU_REG_2P5_ENABLE_PULLDOWN_MASK; in PMU_2P5EnablePullDown()
462 base->REG_2P5 |= PMU_REG_2P5_ENABLE_PULLDOWN_MASK; in PMU_2P1EnablePullDown()
466 base->REG_2P5 &= ~PMU_REG_2P5_ENABLE_PULLDOWN_MASK; in PMU_2P1EnablePullDown()
480 base->REG_2P5 |= PMU_REG_2P5_ENABLE_ILIMIT_MASK; in PMU_2P5EnableCurrentLimit()
484 base->REG_2P5 &= ~PMU_REG_2P5_ENABLE_ILIMIT_MASK; in PMU_2P5EnableCurrentLimit()
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| D | fsl_pmu.c | 45 if (PMU_REG_2P5_OK_VDD2P5_MASK == (PMU_REG_2P5_OK_VDD2P5_MASK & base->REG_2P5)) in PMU_GetStatusFlags()
49 if (PMU_REG_2P5_BO_VDD2P5_MASK == (PMU_REG_2P5_BO_VDD2P5_MASK & base->REG_2P5)) in PMU_GetStatusFlags()
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| /hal_nxp-3.6.0/imx/devices/MCIMX6X/ |
| D | MCIMX6X_M4.h | 28579 …__IO uint32_t REG_2P5; /**< Regulator 2P5 Register, offset: 0x130 … member
28611 #define PMU_REG_2P5_REG(base) ((base)->REG_2P5)
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1011/ |
| D | MIMXRT1011.h | 22848 __IO uint32_t REG_2P5; /**< Regulator 2P5 Register, offset: 0x130 */ member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1015/ |
| D | MIMXRT1015.h | 25539 __IO uint32_t REG_2P5; /**< Regulator 2P5 Register, offset: 0x130 */ member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1024/ |
| D | MIMXRT1024.h | 29709 __IO uint32_t REG_2P5; /**< Regulator 2P5 Register, offset: 0x130 */ member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1021/ |
| D | MIMXRT1021.h | 29726 __IO uint32_t REG_2P5; /**< Regulator 2P5 Register, offset: 0x130 */ member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1051/ |
| D | MIMXRT1051.h | 30769 __IO uint32_t REG_2P5; /**< Regulator 2P5 Register, offset: 0x130 */ member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1041/ |
| D | MIMXRT1041.h | 32354 __IO uint32_t REG_2P5; /**< Regulator 2P5 Register, offset: 0x130 */ member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1042/ |
| D | MIMXRT1042.h | 34205 __IO uint32_t REG_2P5; /**< Regulator 2P5 Register, offset: 0x130 */ member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1052/ |
| D | MIMXRT1052.h | 33476 __IO uint32_t REG_2P5; /**< Regulator 2P5 Register, offset: 0x130 */ member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1061/ |
| D | MIMXRT1061.h | 33099 __IO uint32_t REG_2P5; /**< Regulator 2P5 Register, offset: 0x130 */ member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1062/ |
| D | MIMXRT1062.h | 35734 __IO uint32_t REG_2P5; /**< Regulator 2P5 Register, offset: 0x130 */ member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1064/ |
| D | MIMXRT1064.h | 35728 __IO uint32_t REG_2P5; /**< Regulator 2P5 Register, offset: 0x130 */ member
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