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Searched refs:QuadSPI_SOCCR_OCTEN_MASK (Results 1 – 4 of 4) sorted by relevance

/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK80F25615/
DMK80F25615.h18520 #define QuadSPI_SOCCR_OCTEN_MASK (0x8000U) macro
18526 … (((uint32_t)(((uint32_t)(x)) << QuadSPI_SOCCR_OCTEN_SHIFT)) & QuadSPI_SOCCR_OCTEN_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK82F25615/
DMK82F25615.h19493 #define QuadSPI_SOCCR_OCTEN_MASK (0x8000U) macro
19499 … (((uint32_t)(((uint32_t)(x)) << QuadSPI_SOCCR_OCTEN_SHIFT)) & QuadSPI_SOCCR_OCTEN_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK27FA15/
DMK27FA15.h18050 #define QuadSPI_SOCCR_OCTEN_MASK (0x8000U) macro
18056 … (((uint32_t)(((uint32_t)(x)) << QuadSPI_SOCCR_OCTEN_SHIFT)) & QuadSPI_SOCCR_OCTEN_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK28FA15/
DMK28FA15.h18052 #define QuadSPI_SOCCR_OCTEN_MASK (0x8000U) macro
18058 … (((uint32_t)(((uint32_t)(x)) << QuadSPI_SOCCR_OCTEN_SHIFT)) & QuadSPI_SOCCR_OCTEN_MASK)