Searched refs:QuadSPI_LUT_COUNT (Results 1 – 15 of 15) sorted by relevance
1206 DEV_ASSERT_QSPI(LutRegister < QuadSPI_LUT_COUNT); in Qspi_Ip_SetLut()1225 DEV_ASSERT_QSPI(StartLutRegister < QuadSPI_LUT_COUNT); in Qspi_Ip_WriteLuts_Privileged()1227 DEV_ASSERT_QSPI((StartLutRegister + Size) <= QuadSPI_LUT_COUNT); in Qspi_Ip_WriteLuts_Privileged()1518 DEV_ASSERT_QSPI(SeqId < (QuadSPI_LUT_COUNT / FEATURE_QSPI_LUT_SEQUENCE_SIZE)); in Qspi_Ip_IpCommand()1593 DEV_ASSERT_QSPI(SeqId < (QuadSPI_LUT_COUNT / FEATURE_QSPI_LUT_SEQUENCE_SIZE)); in Qspi_Ip_IpRead()1712 DEV_ASSERT_QSPI(SeqId < (QuadSPI_LUT_COUNT / FEATURE_QSPI_LUT_SEQUENCE_SIZE)); in Qspi_Ip_IpWrite()1906 for (cnt = 2U; cnt < QuadSPI_LUT_COUNT; cnt++) in Qspi_Ip_ResetPrivilegedRegisters_Privileged()2062 for (cnt = 2U; cnt < QuadSPI_LUT_COUNT; cnt++) in Qspi_Ip_ResetAllRegisters()
73 #define QuadSPI_LUT_COUNT 20u macro122 …__IO uint32_t LUT[QuadSPI_LUT_COUNT]; /**< LUT Register, array offset: 0x310, array ste…
73 #define QuadSPI_LUT_COUNT 64u macro117 …__IO uint32_t LUT[QuadSPI_LUT_COUNT]; /**< Look-up Table register, array offset: 0x310,…
73 #define QuadSPI_LUT_COUNT 80u macro135 …__IO uint32_t LUT[QuadSPI_LUT_COUNT]; /**< LUT Register, array offset: 0x310, array ste…
19158 #define QuadSPI_LUT_COUNT (64U) macro
20131 #define QuadSPI_LUT_COUNT (64U) macro
18688 #define QuadSPI_LUT_COUNT (64U) macro
18690 #define QuadSPI_LUT_COUNT (64U) macro
25824 #define QuadSPI_LUT_COUNT (64U) macro
25825 #define QuadSPI_LUT_COUNT (64U) macro
44712 #define QuadSPI_LUT_COUNT (64U) macro
46885 #define QuadSPI_LUT_COUNT (64U) macro
