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Searched refs:QuadSPI_DLLCRA_FREQEN_MASK (Results 1 – 3 of 3) sorted by relevance

/hal_nxp-3.6.0/s32/drivers/s32k3/BaseNXP/header/
DS32K344_QUADSPI.h348 #define QuadSPI_DLLCRA_FREQEN_MASK (0x40000000U) macro
351 … (((uint32_t)(((uint32_t)(x)) << QuadSPI_DLLCRA_FREQEN_SHIFT)) & QuadSPI_DLLCRA_FREQEN_MASK)
/hal_nxp-3.6.0/s32/drivers/s32k3/Fls/include/
DQspi_Ip_HwAccess.h355 RegValue &= (uint32)(~((uint32)QuadSPI_DLLCRA_FREQEN_MASK)); in Qspi_Ip_DLLFreqEnA()
/hal_nxp-3.6.0/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_QUADSPI.h508 #define QuadSPI_DLLCRA_FREQEN_MASK (0x40000000U) macro
511 … (((uint32_t)(((uint32_t)(x)) << QuadSPI_DLLCRA_FREQEN_SHIFT)) & QuadSPI_DLLCRA_FREQEN_MASK)