| /hal_nxp-3.6.0/mcux/mcux-sdk/drivers/ipwm/ |
| D | fsl_pwm.h | 205 base->PWMCR |= PWM_PWMCR_EN_MASK; in PWM_StartTimer()
215 base->PWMCR &= ~(PWM_PWMCR_EN_MASK); in PWM_StopTimer()
231 base->PWMCR |= PWM_PWMCR_SWR_MASK; in PWM_SoftwareReset()
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| D | fsl_pwm.c | 85 base->PWMCR = (PWM_PWMCR_REPEAT(config->sampleRepeat) | PWM_PWMCR_PRESCALER(config->prescale) | in PWM_Init()
103 base->PWMCR &= ~(PWM_PWMCR_CLKSRC_MASK); in PWM_Deinit()
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| /hal_nxp-3.6.0/imx/devices/MCIMX6X/ |
| D | MCIMX6X_M4.h | 29198 __IO uint32_t PWMCR; /**< PWM Control Register, offset: 0x0 */ member
29216 #define PWM_PWMCR_REG(base) ((base)->PWMCR)
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| /hal_nxp-3.6.0/imx/devices/MCIMX7D/ |
| D | MCIMX7D_M4.h | 33236 __IO uint32_t PWMCR; /**< PWM Control Register, offset: 0x0 */ member
33254 #define PWM_PWMCR_REG(base) ((base)->PWMCR)
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MN2/ |
| D | MIMX8MN2_cm7.h | 43378 __IO uint32_t PWMCR; /**< PWM Control Register, offset: 0x0 */ member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MN5/ |
| D | MIMX8MN5_cm7.h | 43380 __IO uint32_t PWMCR; /**< PWM Control Register, offset: 0x0 */ member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MN3/ |
| D | MIMX8MN3_cm7.h | 43380 __IO uint32_t PWMCR; /**< PWM Control Register, offset: 0x0 */ member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MN4/ |
| D | MIMX8MN4_cm7.h | 43378 __IO uint32_t PWMCR; /**< PWM Control Register, offset: 0x0 */ member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MN1/ |
| D | MIMX8MN1_cm7.h | 43380 __IO uint32_t PWMCR; /**< PWM Control Register, offset: 0x0 */ member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MN6/ |
| D | MIMX8MN6_ca53.h | 43392 __IO uint32_t PWMCR; /**< PWM Control Register, offset: 0x0 */ member
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| D | MIMX8MN6_cm7.h | 43378 __IO uint32_t PWMCR; /**< PWM Control Register, offset: 0x0 */ member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MQ5/ |
| D | MIMX8MQ5_cm4.h | 43706 __IO uint32_t PWMCR; /**< PWM Control Register, offset: 0x0 */ member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MD6/ |
| D | MIMX8MD6_cm4.h | 45879 __IO uint32_t PWMCR; /**< PWM Control Register, offset: 0x0 */ member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MD7/ |
| D | MIMX8MD7_cm4.h | 45879 __IO uint32_t PWMCR; /**< PWM Control Register, offset: 0x0 */ member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MQ7/ |
| D | MIMX8MQ7_cm4.h | 45879 __IO uint32_t PWMCR; /**< PWM Control Register, offset: 0x0 */ member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MQ6/ |
| D | MIMX8MQ6_cm4.h | 45879 __IO uint32_t PWMCR; /**< PWM Control Register, offset: 0x0 */ member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8QM6/ |
| D | MIMX8QM6_ca53.h | 70463 __IO uint32_t PWMCR; /**< PWM Control Register, offset: 0x0 */ member
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| D | MIMX8QM6_dsp.h | 76098 __IO uint32_t PWMCR; /**< PWM Control Register, offset: 0x0 */ member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MM6/ |
| D | MIMX8MM6_ca53.h | 61340 __IO uint32_t PWMCR; /**< PWM Control Register, offset: 0x0 */ member
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| D | MIMX8MM6_cm4.h | 61875 __IO uint32_t PWMCR; /**< PWM Control Register, offset: 0x0 */ member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MM5/ |
| D | MIMX8MM5_cm4.h | 61875 __IO uint32_t PWMCR; /**< PWM Control Register, offset: 0x0 */ member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MM1/ |
| D | MIMX8MM1_cm4.h | 61875 __IO uint32_t PWMCR; /**< PWM Control Register, offset: 0x0 */ member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MM2/ |
| D | MIMX8MM2_cm4.h | 61875 __IO uint32_t PWMCR; /**< PWM Control Register, offset: 0x0 */ member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MM3/ |
| D | MIMX8MM3_cm4.h | 61875 __IO uint32_t PWMCR; /**< PWM Control Register, offset: 0x0 */ member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MM4/ |
| D | MIMX8MM4_cm4.h | 61875 __IO uint32_t PWMCR; /**< PWM Control Register, offset: 0x0 */ member
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