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Searched refs:PUF_STAT_ERROR_MASK (Results 1 – 25 of 34) sorted by relevance

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/hal_nxp-3.6.0/mcux/mcux-sdk/drivers/puf/
Dfsl_puf.c72 if (0U != (base->STAT & (PUF_STAT_SUCCESS_MASK | PUF_STAT_ERROR_MASK))) in puf_waitForInit()
324 while (0U == (base->STAT & (PUF_STAT_BUSY_MASK | PUF_STAT_ERROR_MASK))) in PUF_Enroll()
393 while (0U == (base->STAT & (PUF_STAT_BUSY_MASK | PUF_STAT_ERROR_MASK))) in PUF_Start()
484 while (0U == (base->STAT & (PUF_STAT_BUSY_MASK | PUF_STAT_ERROR_MASK))) in PUF_SetIntrinsicKey()
587 while (0U == (base->STAT & (PUF_STAT_BUSY_MASK | PUF_STAT_ERROR_MASK))) in PUF_SetUserKey()
660 while (0U == (base->STAT & (PUF_STAT_BUSY_MASK | PUF_STAT_ERROR_MASK))) in puf_getHwKey()
886 while (0U == (base->STAT & (PUF_STAT_BUSY_MASK | PUF_STAT_ERROR_MASK))) in PUF_GetKey()
943 if ((0U != (base->STAT & PUF_STAT_ERROR_MASK)) && (0U == base->ALLOW)) in PUF_Zeroize()
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54S005/
DLPC54S005.h7446 #define PUF_STAT_ERROR_MASK (0x4U) macro
7450 … (((uint32_t)(((uint32_t)(x)) << PUF_STAT_ERROR_SHIFT)) & PUF_STAT_ERROR_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54S016/
DLPC54S016.h11023 #define PUF_STAT_ERROR_MASK (0x4U) macro
11026 … (((uint32_t)(((uint32_t)(x)) << PUF_STAT_ERROR_SHIFT)) & PUF_STAT_ERROR_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54S018M/
DLPC54S018M.h12339 #define PUF_STAT_ERROR_MASK (0x4U) macro
12343 … (((uint32_t)(((uint32_t)(x)) << PUF_STAT_ERROR_SHIFT)) & PUF_STAT_ERROR_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54S018/
DLPC54S018.h12339 #define PUF_STAT_ERROR_MASK (0x4U) macro
12343 … (((uint32_t)(((uint32_t)(x)) << PUF_STAT_ERROR_SHIFT)) & PUF_STAT_ERROR_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC55S06/
DLPC55S06.h18750 #define PUF_STAT_ERROR_MASK (0x4U) macro
18754 … (((uint32_t)(((uint32_t)(x)) << PUF_STAT_ERROR_SHIFT)) & PUF_STAT_ERROR_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC55S04/
DLPC55S04.h18750 #define PUF_STAT_ERROR_MASK (0x4U) macro
18754 … (((uint32_t)(((uint32_t)(x)) << PUF_STAT_ERROR_SHIFT)) & PUF_STAT_ERROR_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC55S26/
DLPC55S26.h16052 #define PUF_STAT_ERROR_MASK (0x4U) macro
16056 … (((uint32_t)(((uint32_t)(x)) << PUF_STAT_ERROR_SHIFT)) & PUF_STAT_ERROR_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC55S28/
DLPC55S28.h16052 #define PUF_STAT_ERROR_MASK (0x4U) macro
16056 … (((uint32_t)(((uint32_t)(x)) << PUF_STAT_ERROR_SHIFT)) & PUF_STAT_ERROR_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC55S16/
DLPC55S16.h19480 #define PUF_STAT_ERROR_MASK (0x4U) macro
19484 … (((uint32_t)(((uint32_t)(x)) << PUF_STAT_ERROR_SHIFT)) & PUF_STAT_ERROR_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC55S66/
DLPC55S66_cm33_core0.h16650 #define PUF_STAT_ERROR_MASK (0x4U) macro
16654 … (((uint32_t)(((uint32_t)(x)) << PUF_STAT_ERROR_SHIFT)) & PUF_STAT_ERROR_MASK)
DLPC55S66_cm33_core1.h16650 #define PUF_STAT_ERROR_MASK (0x4U) macro
16654 … (((uint32_t)(((uint32_t)(x)) << PUF_STAT_ERROR_SHIFT)) & PUF_STAT_ERROR_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC55S14/
DLPC55S14.h19479 #define PUF_STAT_ERROR_MASK (0x4U) macro
19483 … (((uint32_t)(((uint32_t)(x)) << PUF_STAT_ERROR_SHIFT)) & PUF_STAT_ERROR_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC55S69/
DLPC55S69_cm33_core1.h16650 #define PUF_STAT_ERROR_MASK (0x4U) macro
16654 … (((uint32_t)(((uint32_t)(x)) << PUF_STAT_ERROR_SHIFT)) & PUF_STAT_ERROR_MASK)
DLPC55S69_cm33_core0.h16650 #define PUF_STAT_ERROR_MASK (0x4U) macro
16654 … (((uint32_t)(((uint32_t)(x)) << PUF_STAT_ERROR_SHIFT)) & PUF_STAT_ERROR_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT685S/
DMIMXRT685S_dsp.h18019 #define PUF_STAT_ERROR_MASK (0x4U) macro
18023 … (((uint32_t)(((uint32_t)(x)) << PUF_STAT_ERROR_SHIFT)) & PUF_STAT_ERROR_MASK)
DMIMXRT685S_cm33.h26005 #define PUF_STAT_ERROR_MASK (0x4U) macro
26009 … (((uint32_t)(((uint32_t)(x)) << PUF_STAT_ERROR_SHIFT)) & PUF_STAT_ERROR_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT633S/
DMIMXRT633S.h26005 #define PUF_STAT_ERROR_MASK (0x4U) macro
26009 … (((uint32_t)(((uint32_t)(x)) << PUF_STAT_ERROR_SHIFT)) & PUF_STAT_ERROR_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT595S/
DMIMXRT595S_dsp.h29698 #define PUF_STAT_ERROR_MASK (0x4U) macro
29701 … (((uint32_t)(((uint32_t)(x)) << PUF_STAT_ERROR_SHIFT)) & PUF_STAT_ERROR_MASK)
DMIMXRT595S_cm33.h36956 #define PUF_STAT_ERROR_MASK (0x4U) macro
36959 … (((uint32_t)(((uint32_t)(x)) << PUF_STAT_ERROR_SHIFT)) & PUF_STAT_ERROR_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT533S/
DMIMXRT533S.h35329 #define PUF_STAT_ERROR_MASK (0x4U) macro
35332 … (((uint32_t)(((uint32_t)(x)) << PUF_STAT_ERROR_SHIFT)) & PUF_STAT_ERROR_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT555S/
DMIMXRT555S.h36955 #define PUF_STAT_ERROR_MASK (0x4U) macro
36958 … (((uint32_t)(((uint32_t)(x)) << PUF_STAT_ERROR_SHIFT)) & PUF_STAT_ERROR_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1165/
DMIMXRT1165_cm7.h63284 #define PUF_STAT_ERROR_MASK (0x4U) macro
63290 … (((uint32_t)(((uint32_t)(x)) << PUF_STAT_ERROR_SHIFT)) & PUF_STAT_ERROR_MASK)
DMIMXRT1165_cm4.h64217 #define PUF_STAT_ERROR_MASK (0x4U) macro
64223 … (((uint32_t)(((uint32_t)(x)) << PUF_STAT_ERROR_SHIFT)) & PUF_STAT_ERROR_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1175/
DMIMXRT1175_cm7.h74468 #define PUF_STAT_ERROR_MASK (0x4U) macro
74474 … (((uint32_t)(((uint32_t)(x)) << PUF_STAT_ERROR_SHIFT)) & PUF_STAT_ERROR_MASK)

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